W681360WG Nuvoton Technology Corporation of America, W681360WG Datasheet - Page 11

• Manufacturer Part Number: W681360WG
• Description: IC VOICEBND CODEC 3V 1CH 20TSSOP
• Manufacturer: Nuvoton Technology Corporation of America
• Type: PCMr

Specifications of W681360WG

• Data Interface: PCM Audio Interface
• Resolution (bits): 13 b
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: No
• Voltage - Supply, Analog: 2.7 V ~ 5.25 V
• Voltage - Supply, Digital: 2.7 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.25V
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: W681360ES - KIT EVAL FOR W681360
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

The W681360 can be put in the receive path adjust mode by applying a logic “1” to the BCLKR pin
while all other clocks are clocked normally. The device is then in a position to read 16-bits of data,
with three additional coefficient bits an addend to the 13-bit digital voice data. These three coefficients
are used to program a receive path attenuation, thereby allowing the receive signal to be attenuated
according to the values in the following table. If the feature is not used the default value is 0dB.
The power supply for the analog and digital parts of the W681360 must be 2.7V to 5.25V. This supply
voltage is connected to the V
ceramic capacitor.
The system has an internal precision voltage reference which generates the V
ground voltage. This voltage needs to be decoupled to V
capacitor.
The analog ground reference voltage is available for external reference at the V
needs to be decoupled to V
voltage is generated from the voltage on the V
processing.
TABLE 7.2: ATTENUATION COEFFICIENT RELATIONSHIP IN RECEIVE GAIN ADJUST MODE
7.3. P
7.2.1. Receive Gain Adjust Mode
7.3.1. Analog and Digital Supply
7.3.2. Analog Ground Reference Bypass
7.3.3. Analog Ground Reference Voltage Output
OWER
M
ANAGEMENT
Coefficient
SS
DD
000
001
010
011
100
101
110
111
through a 0.01 μF ceramic capacitor. The analog ground reference
pin. The V
DD
pin needs to be decoupled to ground through a 0.1 μF
REF
- 11 -
pin and is also used for the internal signal
Attenuation (dB)
SS
at the V
12
15
18
21
0
3
6
9
Publication Release Date: September 2005
REF
pin through a 0.1 μF ceramic
DD
AG
/2 mid-supply analog
pin. This voltage
W681360
Revision A.2