CS42518-CQZ Cirrus Logic Inc, CS42518-CQZ Datasheet - Page 14

• Manufacturer Part Number: CS42518-CQZ
• Description: IC CODEC S/PDIF RCVR 64LQFP
• Manufacturer: Cirrus Logic Inc
• Type: General Purposer

Specifications of CS42518-CQZ

• Package / Case: 64-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 110
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 8
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/8 DAC
• Thd Plus Noise: - 100 dB ADC / - 100 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1502 - BOARD EVAL FOR CS42518 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1036

14
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI
(For CQZ, T
5.25 V; Inputs: Logic 0 = DGND, Logic 1 = VLC, C
Notes:
CCLK Clock Frequency
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
20. If Fs is lower than 46.875 kHz, the maximum CCLK frequency should be less than 128 Fs. This is
21. Data must be held for sufficient time to bridge the transition time of CCLK.
22. For f
A
dictated by the timing requirements necessary to access the Channel Status and User Bit buffer
memory. Access to the control register file can be carried out at the full 6 MHz rate. The minimum
allowable input sample rate is 8 kHz, so choosing CCLK to be less than or equal to 1.024 MHz should
be safe for all possible conditions.
= -10 to +70° C; For DQZ, T
sck
<1 MHz.
Parameter
CDOUT
CDIN
CCLK
CS
t css
Figure 4. Control Port Timing - SPI Format
t r2
A
= -40 to +85° C; VA=VARX = 5 V, VD =VLS= 3.3 V; VLC = 1.8 V to
t dsu
L
t scl
t f2
= 30 pF)
(Note 20)
(Note 21)
(Note 22)
(Note 22)
t sch
t dh
t pd
Symbol
f
t
t
t
t
t
t
t
csh
sch
dsu
t
t
t
t
sck
css
scl
dh
pd
r1
f1
r2
f2
Min
1.0
20
66
66
40
15
0
-
-
-
-
-
t csh
™
Typ
FORMAT
-
-
-
-
-
-
-
-
-
-
-
-
Max
100
100
6.0
50
25
25
-
-
-
-
-
-
CS42518
DS584F1
Units
MHz
µ s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns