CS42L52-CNZ Cirrus Logic Inc, CS42L52-CNZ Datasheet - Page 34

• Manufacturer Part Number: CS42L52-CNZ
• Description: IC CODEC STER HDPN & SPKR 40QFN
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS42L52-CNZ

• Package / Case: 40-QFN
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 99 / 98
• Voltage - Supply, Analog: 1.65 V ~ 2.63 V
• Voltage - Supply, Digital: 1.65 V ~ 2.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 8
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (I2C)
• Resolution: 24 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 88 dB ADC / - 86 dB DAC
• Package: 40QFN EP
• Adc/dac Resolution: 24 Bit
• Sampling Rate: 96 KSPS
• Number Of Dacs: 2
• Operating Supply Voltage: 2.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1580 - REFERENCE DESIGN FOR CS42L52598-1508 - BOARD EVAL FOR 42LDB1 CODEC598-1505 - BOARD EVAL FOR CS42L52 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1628

34
4.6
Serial Port Clocking
The CODEC serial audio interface port operates either as a slave or master, determined by the M/S bit. It
accepts externally generated clocks in Slave Mode and will generate synchronous clocks derived from an
input master clock (MCLK) in Master Mode. Refer to the tables below for the required setting in register 05h
and 06h associated with a given MCLK and sample rate.
Referenced Control
VPREF ................................
SPKxVOL ............................
Referenced Control
M/S
Register 05h
Register 06h
4.5.2.1
Using SPKxVOL, the speaker output level must first be attenuated by the decibel equivalent of the expect-
ed VP supply range (MAX relative to MIN). The CS42L52 then gradually reduces the attenuation as the
VP supply drops from its maximum level, maintaining a nearly constant power output.
Compensation Example 1 (VP Battery supply ranges from 4.5 V to 3.0 V)
1. Set speaker attenuation (SPKxVOL) to -3.5 dB. The VP supply changes ~3.5 dB.
Compensation Example 2 (VP Battery supply ranges from 5.0 V to 1.6 V)
1. Set speaker attenuation (SPKxVOL) to -10 dB. The VP supply changes ~9.9 dB.
The CS42L52 automatically adjusts the output level as the battery discharges. Refer to
34. In this example, the VP supply changes over a wide range, illustrating the accuracy of the CS42L52’s
battery compensation.
The CS42L52 automatically adjusts the output level as the battery discharges.
2. Set the reference VP supply (VPREF) to 4.5 V.
3. Enable battery compensation (BATTCMP).
2. Set the reference VP supply (VPREF) to 5.0 V.
3. Enable battery compensation (BATTCMP).
Maintaining a Desired Output Level
-10
-12
-14
-16
-18
-20
-22
-24
-6
-8
4.9
Register Location
“Master/Slave Mode” on page 46
“Clocking Control (Address 05h)” on page 44
“Interface Control 1 (Address 06h)” on page 46
Register Location
“VP Reference” on page 72
“Speaker Volume Control” on page 64
4.6
Figure 15. Battery Compensation
4.3
4
3.7
VP Supply (V)
5/13/08
3.4
3.1
2.8
Uncompensated
Battery Compensated
2.5
PWM Output
PWM Output Level
Level
2.2
1.9
1.6
Figure 15 on page
CS42L52
DS680F1