MMA8110EGR2 Freescale Semiconductor, MMA8110EGR2 Datasheet - Page 43

• Manufacturer Part Number: MMA8110EGR2
• Description: Board Mount Accelerometers Z-AXIS 100G W/CAP BOND
• Manufacturer: Freescale Semiconductor
• Series: MMA81r

Specifications of MMA8110EGR2

• Sensing Axis: Z
• Acceleration: 100 g
• Sensitivity: 4.01 mV/g
• Package / Case: SOIC-20 Wide
• Axis: Z
• Acceleration Range: ±100g
• Voltage - Supply: 6.3 V ~ 30 V
• Output Type: Digital
• Bandwidth: -
• Interface: SPI
• Mounting Type: Surface Mount
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Sensors
Freescale Semiconductor
A.4.1 Interface Data Bit Stream
The 16-bit SPI serial data consists of 6 bits for a data address, 1 bit for a data direction, and 8 bits for the data to be transferred
as shown below.
A[5:0]
Register array location to be read or written.
D[7:0]
Register array data. This is the data to be transferred to the register array during write operations, or the data contained in the
array at the associated address during read operations.
RW
Control of data direction during the clocking of D[7:0] data bits as follows:
RW = 1
Register array write. D[7:0] are transferred into the register array during subsequent transitions of the CLK input.
RW = 0
Register array read. Data are transferred from the register array during subsequent transitions of the CLK input.
A.4.2 Register Array Read Operation
Read operations are completed through16-bit transfers using the SPI as shown below. Data contained in the array at the asso-
ciated address are presented at the D
Should the data transfer be corrupted by e.g., noise on the clock line, a device reset is required to restore the state of internal
logic.
FUNCTION
D
IN
D
CLK
/V
OUT
P2
A[5]
15
A[5] A[4] A[3] A[2] A[1] A[0] RW
A[4]
1
14
Figure A-4. Serial Data Timing, Register Array Read Operation
2
A[3]
13
OUT
3
A[2]
12
pin during the 8th through 15th falling edges at the CLK input.
4
A[1]
Figure A-3. Serial Data Stream
11
5
A[0]
10
6
RW
7
9
8
⎯
8
BIT
D[7]
D[7]
7
9
D[6]
D[6] D[5] D[4] D[3] D[2] D[1] D[0]
6
10
D[5]
5
11
D[4]
12
4
D[3]
13
3
14
D[2]
2
15
D[1]
1
MMA81XXEG
16
D[0]
0
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