QU80386EXTC25 Intel, QU80386EXTC25 Datasheet - Page 17

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QU80386EXTC25

Manufacturer Part Number
QU80386EXTC25
Description
IC INT PROC 5V 25MHZ 132QFP
Manufacturer
Intel
Datasheet

Specifications of QU80386EXTC25

Processor Type
386EX
Features
32-bit, Extended Temp
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
863826

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QU80386EXTC25
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Part Number:
QU80386EXTC25
Manufacturer:
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Quantity:
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Datasheet
Table 4.
Intel386™ EX Microprocessor Pin Descriptions (Sheet 5 of 6)
SRXCLK
SSIORX
SSIOTX
STXCLK
TCK
TDI
TDO
TMRCLK2:0
TMRGATE2:0
TMROUT2
TMROUT1:0
TMS
NOTES:
1. X if clock source is internal; Q if clock source is external
2. Q if JTAG unit is shifting out data, Z if it is not
Symbol
Type
I/O
I/O
O
O
O
O
I
I
I
I
I
I
P(Z)/ P(Q)
H(Z)/H(Q)
R(Z)/R(Q)
Output States
P(X)/P(Q)
P(X)/P(Q)
P(X)/P(Q)
P(X)/P(Q)
P(X)/P(Q)
I(Z)/I(Q)
R(WH)
R(WH)
R(WH)
R(WL)
R(WL)
H(Q)
H(Q)
H(Q)
H(Q)
H(Q)
I(Q)
I(Q)
I(Q)
I(Q)
I(Q)
Note 2
Note 1
Note 1
Note 1
Note 2
Note 2
Note 1
Note 1
Note 2
SSIO Receive Clock synchronizes data being accepted by the
synchronous serial port. SRXCLK is multiplexed with DTR1#.
SSIO Receive Serial Data accepts serial data (most-significant
bit first) being sent to the synchronous serial port. SSIORX is
multiplexed with RI1#.
SSIO Transmit Serial Data sends serial data (most-significant
bit first) from the synchronous serial port. SSIOTX is multiplexed
with RTS1#.
Intel does not specify a data hold time for SSIOTX. Slower
external devices may require additional hardware to properly
interface the SSIO unit.
SSIO Transmit Clock synchronizes data being sent by the
synchronous serial port. STXCLK is multiplexed with DSR1.
TAP (Test Access Port) Controller Clock provides the clock
input for the JTAG logic. It has a permanent weak pull-up
resistor.
TAP (Test Access Port) Controller Data Input is the serial
input for test instructions and data. It has a permanent weak pull-
up resistor.
TAP (Test Access Port) Controller Data Output is the serial
output for test instructions and data.
Timer/Counter Clock Inputs can serve as external clock inputs
for the corresponding timer/counters. (The timer/counters can
also be clocked internally.) They are multiplexed as follows:
TMRCLK2 with PEREQ, TMRCLK1 with INT6, and TMRCLK0
with INT4. TMRCLK2 has a temporary weak pull-down resistor.
Timer/Counter Gate Inputs can control the corresponding
timer/counter’s counting (enable, disable, or trigger, depending
on the programmed mode). They are multiplexed as follows:
TMRGATE2 with BUSY#, TMRGATE1 with INT7, and
TMRGATE0 with INT5. TMRGATE2 has a temporary weak pull-
up resistor.
Timer/Counter Outputs provide the output of the corresponding
timer/counter. The form of the output depends on the
programmed mode. They are multiplexed as follows: TMROUT2
with ERROR#, TMROUT1 with P3.1 and INT8, and TMROUT0
with P3.0 and INT9.
Timer/Counter Outputs provide the output of the corresponding
timer/counter. The form of the output depends on the
programmed mode. They are multiplexed as follows: TMROUT2
with ERROR#, TMROUT1 with P3.1 and INT8, and TMROUT0
with P3.0 and INT9.
TAP (Test Access Port) Controller Mode Select controls the
sequence of the TAP controller’s states. It has a permanent
weak pull-up resistor.
Intel386™ EX Embedded Microprocessor
Name and Function
17

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