MC68020RC25E Freescale Semiconductor, MC68020RC25E Datasheet - Page 152

• Manufacturer Part Number: MC68020RC25E
• Description: IC MICROPROC 32-BIT 25MHZ 114PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68020RC25E

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 114-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: Q1165253

MOTOROLA
SP
SP
SP
SP
+$0C
+$02
+$06
+$02
+$06
+$02
+$06
+$08
+$02
+$06
+$08
+$12
FOUR-WORD STACK FRAME — FORMAT $0
STACK FRAME (10 WORDS) — FORMAT $9
15
15
15
15
0 0 0 0
0 0 0 1
0 0 1 0
1 0 0 1
COPROCESSOR MIDINSTRUCTION
STACK FRAME — FORMAT $1
STACK FRAME — FORMAT $2
THROWAWAY FOUR-WORD
INSTRUCTION ADDRESS
INSTRUCTION ADDRESS
INTERNAL REGISTERS,
PROGRAM COUNTER
PROGRAM COUNTER
PROGRAM COUNTER
PROGRAM COUNTER
Stack Frames
STATUS REGISTER
STATUS REGISTER
STATUS REGISTER
STATUS REGISTER
SIX-WORD
4 WORDS
VECTOR OFFSET
VECTOR OFFSET
VECTOR OFFSET
VECTOR OFFSET
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 6-5. Exception Stack Frames
Go to: www.freescale.com
M68020 USER’S MANUAL
0
0
0
0
Interrupt
Format Error
TRAP #N
Illegal Instruction
A-Line Instruction
F-Line Instruction
Privilege Violation
Coprocessor
Preinstruction
Created on
Interrupt Stack
during interrupt
exception processing
when transition from
master state to
interrupt state occurs
CHK
CHK2
cpTRAPcc
TRAPcc
TRAPPV
Trace
Zero Divide
MMU Configuration
Coprocessor
Postinstruction
Coprocessor
Midinstruction
Main-Detected
Protocol Violation
Interrupt Detected
During Coprocessor
Instruction
(supported with 'null
come again with
interrupts allowed'
primitive)
Exception Types (Stacked PC Points to)
[Next instruction]
[RTE or cpRESTORE instruction
[NEXT instruction]
[Illegal instruction]
[A-line instruction]
[F-line instruction]
[First word of instruction causing
Privilege Violation]
[Opword of instruction that
returned the 'take preinstruction'
primitive]
[Next instruction — same as on
master stack]
[Next instruction for all these
exceptions]
INSTRUCTION ADDRESS
is the address of the instruction
that caused the exception
[Next word to be fetched from
instruction stream for all these
exceptions]
INSTRUCTION ADDRESS
is the address of the instruction
that caused the exception
6- 27