TSPC603RVGH10LC Atmel, TSPC603RVGH10LC Datasheet - Page 45

• Manufacturer Part Number: TSPC603RVGH10LC
• Description: IC MPU 32BIT 10MHZ 255CBGA
• Manufacturer: Atmel

Specifications of TSPC603RVGH10LC

• Processor Type: PowerPC 603e 32-Bit RISC
• Speed: 233MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 255-CBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Notes:
14. System Design Information
14.1
5410B–HIREL–09/05
PLL_CFG[0-3]
1010
0111
1011
1001
1101
0011
1111
1. Some PLL configurations may select bus, CPU or VCO frequencies which are not supported.
2. In PLL-bypass mode, the SYSCLK input signal clocks the internal processor directly, the PLL is disabled, and the bus mode
3. In clock-off mode, no clocking occurs inside the 603e regardless of the SYSCLK input.
PLL Power Supply Filtering
is set for 1:1 mode operation. This mode is intended for factory use only.
The AC timing specifications given in this document do not apply in PLL-bypass mode.
Bus-to-Core
Multiplier
4.5x
5.5x
4x
5x
6x
The A
phase-locked loop. To ensure stability of the internal clock, the power supplied to the A
signal should be filtered using a circuit similar to the one shown in
be placed as close as possible to the A
The 0.1 µF capacitor should be closest to the A
finally the 10Ω resistor to
Figure 14-1. PLL Power Supply Filter Circuit
V
Core-to VCO
DD
Multiplier
CPU Frequency in MHZ (VCO Frequency in MHz) specific to CERQUAD
power signal is implemented on the 603e to provide power to the clock generation
2x
2x
2x
2x
2x
V DD
25 MHz
(300)
Bus
150
V
–
–
–
–
DD
. These traces should be kept short and direct.
10Ω
33.33 MHz
(300)
(333)
(366)
(400)
PLL bypass
Bus
150
166
183
200
Clock off
V
–
DD
10 µF
pin to ensure it filters out as much noise as possible.
V
40 MHz
(320)
(360)
(400)
DD
Bus
160
180
200
GND
–
–
pin, followed by the 10 µF capacitor, and
50 MHz
(400)
Bus
200
0.1 µF
–
–
–
–
Figure
14-1. The circuit should
60 MHz
AV DD
Bus
TSPC603R
–
–
–
–
–
66.67 MHz
V
Bus
DD
–
–
–
–
–
input
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