MC7447AHX1000LB Freescale Semiconductor, MC7447AHX1000LB Datasheet - Page 42

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MC7447AHX1000LB

Manufacturer Part Number
MC7447AHX1000LB
Description
IC MPU RISC 32BIT 360-FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC7447AHX1000LB

Processor Type
MPC74xx PowerPC 32-Bit
Speed
1.0GHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
360-FCCBGA
Family Name
MPC74xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
1GHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.3V
Operating Supply Voltage (max)
1.35V
Operating Supply Voltage (min)
1.25V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
360
Package Type
FCCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC7447AHX1000LB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
System Design Information
42
Physical Pin Out
COP Connector
Notes:
1. RUN/STOP, normally found on pin 5 of the COP header, is not implemented on the MPC7447A. Connect
2. Key location; pin 14 is not physically present on the COP header.
3. Component not populated. Populate only if debug tool does not drive QACK.
4. Populate only if debug tool uses an open-drain type output and does not actively negate QACK.
5. If the JTAG interface is implemented, connect HRESET from the target source to TRST from the COP
6. The COP port and target board should be able to independently assert HRESET and TRST to the
pin 5 of the COP header to OV
header though an AND gate to TRST of the part. If the JTAG interface is not implemented, connect
HRESET from the target source to TRST of the part through a 0-Ω isolation resistor.
processor in order to fully control the processor as shown above.
11
13
15
1
1
3
5
7
9
No Pin
Board Sources
KEY
10
12
16
2
4
6
8
From Target
(if any)
MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5
Key
SRESET
HRESET
14
QACK
5
15
11
12
13
10
16
4
6
7
2
Figure 19. JTAG Interface Connection
8
9
1
3
1
2
CHKSTP_IN
CHKSTP_OUT
VDD_SENSE
DD
TMS
TDO
TDI
TCK
QACK
SRESET
TRST
HRESET
NC
NC
with a 10-KΩ pull-up resistor.
2 KΩ
3
0 Ω
10 KΩ
2 KΩ
10 KΩ
5
10 KΩ
10 KΩ
4
10 KΩ
10 KΩ
10 KΩ
10 KΩ
10 KΩ
TDO
OV
OV
OV
OV
OV
OV
OV
TMS
TCK
CHKSTP_OUT
CHKSTP_IN
TDI
OV
SRESET
HRESET
OV
TRST
QACK
OV
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
6
Freescale Semiconductor
6

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