MC7447AHX1000LB Freescale Semiconductor, MC7447AHX1000LB Datasheet - Page 36

• Manufacturer Part Number: MC7447AHX1000LB
• Description: IC MPU RISC 32BIT 360-FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC7447AHX1000LB

• Processor Type: MPC74xx PowerPC 32-Bit
• Speed: 1.0GHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 360-FCCBGA
• Family Name: MPC74xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 1GHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.3V
• Operating Supply Voltage (max): 1.35V
• Operating Supply Voltage (min): 1.25V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 360
• Package Type: FCCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

System Design Information
9.1.2
Spread spectrum clock sources are an increasingly popular way to control electromagnetic interference
emissions (EMI) by spreading the emitted noise to a wider spectrum and reducing the peak noise
magnitude in order to meet industry and government requirements. These clock sources intentionally add
long-term jitter in order to diffuse the EMI spectral content. The jitter specification given in
considers short-term (cycle-to-cycle) jitter only and the clock generator’s cycle-to-cycle output jitter
should meet the MPC7457 input cycle-to-cycle jitter requirement. Frequency modulation and spread are
separate concerns, and the MPC7457 is compatible with spread spectrum sources if the recommendations
listed in
36
Notes:
1. Ratios below 5:1 require an AACK delay See MPC7450 RISC Microprocessor Family Reference Manual , Section
2. The sample bus-to-core frequencies shown are for reference only. Some PLL configurations may select bus, core,
3. In PLL-bypass mode, the SYSCLK input signal clocks the internal processor directly and the PLL is disabled.
4. In PLL-off mode, no clocking occurs inside the MPC7447A regardless of the SYSCLK input.
Table 13. MPC7447A Microprocessor PLL Configuration Example for 1420-MHz Parts (continued)
9.3.3, “MPX Bus Address Tenure Termination.”
or VCO frequencies that are not useful, not supported, or not tested for by the MPC7455; see
AC Specifications,”
However, the bus interface unit requires a 2x clock to function. Therefore, an additional signal, EXT_QUAL, must be
driven at one-half the frequency of SYSCLK and offset in phase to meet the required input setup t
t
processor is clocked at SYSCLK frequency. This mode is intended for factory use and emulator tool use only.
Note: The AC timing specifications given in this document do not apply in PLL-bypass mode.
CFG[0:4]
IXKH
01101
11101
00110
11110
PLL_
Table 14
(see
System Bus Clock (SYSCLK) and Spread Spectrum Sources
Table
are observed.
Multiplier
Bus-to-
9). The result will be that the processor bus frequency will be one-half SYSCLK while the internal
Core
24x
28x
for valid SYSCLK, core, and VCO frequencies.
PLL bypass
MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5
PLL off
Multiplier
Core-to-
Example Bus-to-Core Frequency in MHz (VCO Frequency in MHz)
VCO
2x
2x
(1600)
(1866)
MHz
792
924
33
PLL off, SYSCLK clocks core circuitry directly
(2400)
(2800)
1200
1400
MHz
50
MHz
PLL off, no core clocking occurs
67
Bus (SYSCLK) Frequency
MHz
75
MHz
83
MHz
100
Section 5.2.1, “Clock
Freescale Semiconductor
IVKH
MHz
133
and hold time
Table 8
MHz
167