MC68030FE16C Freescale Semiconductor, MC68030FE16C Datasheet - Page 510
MC68030FE16C
Manufacturer Part Number
MC68030FE16C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030FE16C
Processor Type
M680x0 32-Bit
Speed
166MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68030FE16C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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11,6.14 Bit Field Manipulation Instructions
MOTOROLA
to account for the appropriate effective address time. For instruction-cache
The bit field manipulation instruction table indicates the number of clock
periods needed for the processor to perform the specified bit field operation
using the given addressing mode. Footnotes indicate when it is necessary
case and for no-cache case, the total number of clock cycles is outside the
parentheses. The number of read, prefetch, and write cycles is given inside
the parentheses as (r/p/w). The read, prefetch, and write cycles are included
All timing data assumes two-clock reads and writes.
in the total clock cycle number.
*Add Calculate Immediate Effective Address Time
NOTE:
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
BFTST
BFCHG
BFCHG
BFCHG
BFCLR
BFCLR
BFCLR
BFSET
BFEXTS
BFEXTS
BFEXTS
BFEXTU
BFINS
BFFFO
BFFFO
BFFFO
BFTST
BFTST
BFSET
BFSET
BFEXTU
BFEXTU
BFINS
BFINS
that require only one operand cycle to access,
A bit field of 32 bits may span 5 bytes that require two operand
Instruction
Mem (<5 Bytes)
Mem (5 Bytes)
Dn
Mem (<5 Bytes)
Mem (5 Bytes)
Dn
Mem (<5 Bytes)
Mem (5 Bytes)
Mem (<5 Bytes)
Dn
Mem (5 Bytes)
Mem (<5 Bytes)
Mem (5 Bytes)
Mem (<5 Bytes)
Mem (5 Bytes)
Mem (<5 Bytes)
Mere (5 Bytes)
Dn
Mem (<5 Bytes)
Mem (5 Bytes)
Dn
Dn
Dn
Dn
MC68030 USER'S MANUAL
Head
20
14
14
14
10
10
12
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
Tail
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
cycles to access or may span 4 bytes
I-CacheCase
22(2/0/2)
22(2/0/2)
22(2/0/2)
20(0/0/0)
22(1/0/0)
28(2/0/0)
10(1/0/0)
14(2/0/0)
14(0/0/0)
14(1/0/1)
14(0/0/0)
14(1/0/1)
14(0/0/0)
14(1/0/1)
10(0/0/0)
12(1/0/0)
18(2/0/0)
10(0/0/0)
12(1/0/0)
18(2/0/0)
12(0/0/0)
12(1/0/1)
18(2/0/2)
8(0/0/0)
No-Cache Case
10(1/1/0)
14(2/1/0)
14(0/1/0)
14(1/1/1)
14(0/1/0)
14(1/1/1)
14(0/1/0)
10(0/1/0)
12(1/1/0)
18(2/1/0)
10(0/1/0)
12(1/1/0)
18(2/1/0)
12(1/1/1)
18(2/1/2)
22(2/1/2)
22(2/1/2)
22(2/1/2)
20(0/1/0)
22(1/1/0)
28(2/1/0)
14(1/1/1)
12(0/1/0)
8(0/1/0)
11-47
11
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