MC68306EH16B Freescale Semiconductor, MC68306EH16B Datasheet - Page 99

• Manufacturer Part Number: MC68306EH16B
• Description: IC MPU INTEGRATED 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68306EH16B

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Cpu Speed: 16.7MHz
• No. Of Timers: 1
• Embedded Interface Type: UART
• Digital Ic Case Style: PQFP
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

There are three ways to disable a chip select, corresponding to the three match
conditions:
Chip selects 7 through 4 are still matched even if running in address mode (AMODE = 0).
They can be disabled, or they can be used to provide automatic DTACK timing for
externally decoded resources.
If more decodes are necessary than are supplied on the MC68306, one of the existing
chip selects should be used (Figure 5-1) to enable the external decoding, since some
signals used to qualify the chip selects are not available externally.
The registers listed below allow the base address, range, and cycle duration of each chip
select to be independently programmed. The chip select configuration registers do not
support byte writes. The registers can be written as either 16-bit or 32-bit, but 32-bit
accesses are preferred. Any write access affects all 16 bits of the high half or low half
register. Only chip select 0 is affected by reset.
5.2.6.1 CHIP SELECT CONFIGURATION REGISTERS (HIGH HALF)
FFFFFFC0 (CS0)
FFFFFFDC (CS7), FFFFFFD8 (CS6), FFFFFFD4 (CS5), FFFFFFD0 (CS4), FFFFFFCC (CS3), FFFFFFC8 (CS2),
FFFFFFC4 (CS1)
CSA31–CSA17—Chip Select Address
MOTOROLA
RESE
RESE
CSA31
CSA31
15
T:
15
T:
U
1. All CSFCx bits are zero
2. Both CSW/CSR are zero
3. Any unused CSAx bit is one.
0
This bit field selects the base address for each chip select.
CSA3
CSA3
14
14
0
0
0
U
CSA2
CSA2
13
13
9
0
9
U
Unused chip selects must be disabled to prevent interference
with other chip selects, DRAM, or externally decoded
resources.
CSA2
CSA2
12
12
8
0
8
U
CSA2
CSA2
Freescale Semiconductor, Inc.
11
11
7
0
7
U
For More Information On This Product,
CSA2
CSA2
10
10
6
0
6
U
MC68306 USER'S MANUAL
Go to: www.freescale.com
CSA2
CSA2
9
5
0
9
5
U
CSA2
CSA2
8
4
0
8
4
U
NOTE
CSA2
CSA2
7
3
0
7
3
U
CSA22
CSA22
U
6
0
6
CSA21
CSA21
5
0
5
U
CSA20
CSA20
4
0
4
U
CSA19
CSA19
3
0
3
U
CSA18
CSA18
2
0
2
U
SUPERVISOR ONLY
SUPERVISOR ONLY
CSA17
CSA17
U
1
0
1
CSW
CSW
U
5- 9
0
1
0