MC68EC000EI20 Freescale Semiconductor, MC68EC000EI20 Datasheet - Page 30
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MC68EC000EI20
Manufacturer Part Number
MC68EC000EI20
Description
IC MPU 32BIT 20MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68EC000EI20
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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1.6.3 Zeros
Zeros can be positive or negative and represent the real values + 0.0 and – 0.0 (see Figure
1-15).
1.6.4 Infinities
Infinities can be positive or negative and represent real values that exceed the overflow
threshold. A result’s exponent greater than or equal to the maximum exponent value
indicates the overflow for a given data format and operation. This overflow description
ignores the effects of rounding and the user-selectable rounding models. For single- and
double-precision infinities the fraction is a zero. For extended-precision infinities, the
mantissa’s MSB, the explicit integer bit, can be either one or zero (see Figure 1-16).
1.6.5 Not-A-Numbers
When created by the FPU, NANs represent the results of operations having no
mathematical interpretation, such as infinity divided by infinity. All operations involving a
NAN operand as an input return a NAN result. When created by the user, NANs can protect
against unitialized variables and arrays or represent user-defined data types. For extended-
precision NANs, the mantissa’s MSB, the explicit integer bit, can be either one or zero (see
Figure 1-17).
The FPU implements two different types of NANs identified by the value of the MSB of the
mantissa for single- and double-precision, and the MSB of the mantissa minus one for
extended-precision. If the bit is set, it is a nonsignaling NAN, otherwise, it is an SNAN. An
MOTOROLA
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
SIGN OF MANTISSA, 0 OR 1
SIGN OF MANTISSA, 0 OR 1
SIGN OF MANTISSA, 0 OR 1
EXPONENT = MAXIMUM
EXPONENT = MAXIMUM
EXPONENT = 0
Figure 1-17. Not-A-Number Format
Figure 1-16. Infinity Format
Figure 1-15. Zero Format
MANTISSA = ANY NONZERO BIT PATTERN
.
.
.
MANTISSA = 0
MANTISSA = 0
Introduction
1-19
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