Z8018216FSG Zilog, Z8018216FSG Datasheet - Page 12
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Z8018216FSG
Manufacturer Part Number
Z8018216FSG
Description
IC 16MHZ STATIC MIMIC 100-QFP
Manufacturer
Zilog
Datasheet
1.Z8018233FSG.pdf
(109 pages)
Specifications of Z8018216FSG
Processor Type
Z180
Features
Smart Peripheral Controller
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Program Memory Type
ROMLess
Interface Type
UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Zilog
Ports B and C Multiplexed Pin Descriptions
Ports B and C are pin multiplexed with the Z180 ASCI
functions and part of ESCC channel A. The MUX function
is controlled by bits 7-5 in the System Configuration Register.
The MUX is organized as shown in Table 4.
Port Mode
Function
PB7
PB6 Select with bit 6=1
PB5 System Config Reg.
PB4
PB3
PB2 Select with bit 5=1
PB1 System Config Reg.
PB0
PC7
PC6
PC5
PC4
PC3 Select with bit 7=1
PC2 System Config Reg.
PC1
PC0
3-12
Table 4. Multiplexed Port Pins
ASCI/ESCC Mode
Function
RxS,/CTS1
RxA1
TxA1
RxA0
TxA0
/DCD0
/CTS0 (Note 1)
/RTS0
Always Reads /INT2 Ext.
Status
Always Reads /INT1 Ext.
Status
/W//REQA
/SYNCA
/DTR//REQA
/RTSA (Note 2)
/CTSA
/DCDA
PS009801-0301
P R E L I M I N A R Y
Note 1:
When the Port function (PB1) is selected, the internal Z180/
CTS0 is always driven Low. This ensures that the ASCI
channel 0 of the Z180
Note 2:
Interrupt Edge /Pin MUX register, bit 3 chooses between
the /MWR or PC2//RTSA combination; the System
Configuration Register bit 7 chooses between PC2 and
/RTSA.
Refer to Table 5 for the 1st, 2nd and 3rd pin functions.
™
MPU is enabled to transmit data.
Z
ILOG
I
NTELLIGENT
DS971820600
Z80182/Z8L182
P
ERIPHERAL