Z84C2008PEG Zilog, Z84C2008PEG Datasheet - Page 77

• Manufacturer Part Number: Z84C2008PEG
• Description: IC 8MHZ Z80 CMOS PIO 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C2008PEG

• Processor Type: Z80
• Features: Low Power CMOS
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: -40°C To +100°C
• Svhc: No SVHC (18-Jun-2010)
• Rohs Compliant: Yes
• Processor Series: Z84C2xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Base Number: 84
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008005-0205
Because 16-bit registers are used, the size of the block can be up to 64
Kbytes (1K = 1024) long and can be moved from any location in memory
to any other location. Furthermore, the blocks can be overlapping because
there are no constraints on the data used in the three register pairs.
The
only difference is that register pairs HL and DE are decremented after
every move so that a block transfer starts from the highest address of the
designated block rather than the lowest.
Table 10 specifies the Op Codes for the four block search instructions.
The first,
accumulator with the contents of the memory location pointed to by
register HL. The result of the compare is stored in one of the flag bits and
the HL register pair is then incremented and the byte counter (register pair
BC) is decremented.
The instruction
which the compare is repeated until either a match is found or the byte
counter (register pair BC) becomes zero. Thus, this single instruction can
search the entire memory for any 8-bit character.
The
Repeat) are similar instructions, their only difference is that they
decrement HL after every compare so that they search the memory in the
opposite direction. The search is started at the highest location in the
memory block.
These block transfer and compare instructions are extremely powerful in
string manipulation applications.
LDD
CPD
and
(Compare and Decrement) and
CPI
LDDR
(Compare and Increment) compares the data in the
CPIR
instructions are very similar to the
is merely an extension of the
CPDR
Z80 CPU Instruction Description
(Compare, Decrement, and
CPl
LDI
User’s Manual
instruction in
and
Z80 CPU
LDIR
. The
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