A80960HD80SL2GK Intel, A80960HD80SL2GK Datasheet - Page 15
A80960HD80SL2GK
Manufacturer Part Number
A80960HD80SL2GK
Description
IC I960HD 3.3V 80MHZ 168CPGA
Manufacturer
Intel
Datasheet
1.UG80960HD6616SL2GN.pdf
(104 pages)
Specifications of A80960HD80SL2GK
Rohs Status
RoHS non-compliant
Processor Type
i960
Features
HD suffix, 32-Bit, 40MHz Bus
Speed
80MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
168-CPGA
Other names
815177
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3.1
Datasheet
Table 6. Pin Description Nomenclature
Pin Descriptions
This section defines the 80960Hx pins.
descriptions in
which may be driven active according to normal JTAG specifications.
Symbol
H(...)
B(...)
R(...)
A(E)
S(E)
S(L)
A(L)
I/O
O
-
I
Table
Input only pin.
Output only pin.
Pin may be input or output.
Pin must be connected as indicated for proper device functionality.
Synchronous edge sensitive input. This input must meet the setup and hold times relative to
CLKIN to ensure proper operation of the processor.
Synchronous level sensitive input. This input must meet the setup and hold times relative to
CLKIN to ensure proper operation of the processor.
Asynchronous edge-sensitive input.
Asynchronous level-sensitive input.
While the processor bus is in the HOLD state (HOLDA asserted), the pin:
While the processor is in the bus backoff state (BOFF asserted), the pin:
While the processor’s RESET pin is asserted, the pin:
H(1) is driven to V
H(0) is driven to V
H(Z) floats
H(Q) continues to be a valid output
B(1) is driven to V
B(0) is driven to V
B(Z) floats
B(Q) continues to be a valid output
R(1) is driven to V
R(0) is driven to V
R(Z) floats
R(Q) continues to be a valid output
7. All pins float while the processor is in the ONCE mode, except TDO,
CC
SS
CC
SS
CC
SS
Table 6
presents the legend for interpreting the pin
Description
80960HA/HD/HT
15
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