MPC8248VRTIEA Freescale Semiconductor, MPC8248VRTIEA Datasheet - Page 20

IC MPU POWERQUICC II 516-PBGA

MPC8248VRTIEA

Manufacturer Part Number
MPC8248VRTIEA
Description
IC MPU POWERQUICC II 516-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8248VRTIEA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
400MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Family Name
MPC82XX
Device Core
PowerQUICC II
Device Core Size
32b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
516
Package Type
TEPBGA
For Use With
CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

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Part Number:
MPC8248VRTIEA
Manufacturer:
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Part Number:
MPC8248VRTIEA
Manufacturer:
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6
AC Electrical Characteristics
Figure 8
6.2
Table 11
20
PIO/IDMA/TIMER[TGATE assertion] input signals
shows PIO and timer signals.
lists SIU input characteristics.
SIU AC Characteristics
TIMER input signal [TGATE deassertion]
TIMER(sp42/43)/ PIO(sp42a/sp43a)
The CLKIN input to the MPC8272 should not exceed +/– 150 psec. This
represents total input jitter—the combination of short term (peak-to-peak)
and long term (cumulative). The duty cycle of CLKIN should not exceed the
ratio of 40:60.
Spread spectrum clocking is allowed with 1% input frequency down-spread
at maximum 60 KHz modulation rate regardless of input frequency.
The MPC8272 meets the timing requirements of PCI Specification Revision
2.2. Refer to
(Output Hold)” to determine if a specific clock configuration is compliant.
Note: TGATE is asserted on the rising edge of the clock; it is deasserted on the falling edge.
MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 2
IDMA output signals
Section 7, “Clock Configuration
NOTE: CLKIN Jitter and Duty Cycle
NOTE: Spread Spectrum Clocking
output signals
Figure 8. PIO and Timer Signal Diagram
(See note)
(See note)
Sys clk
NOTE: PCI AC Timing
sp22
Modes,” and “Note: Tval
sp22
sp42/sp43
sp23
Freescale Semiconductor
sp42a/sp43a
sp42/sp43
sp23

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