Z85C3008PSG Zilog, Z85C3008PSG Datasheet - Page 5
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Z85C3008PSG
Manufacturer Part Number
Z85C3008PSG
Description
IC 8MHZ Z8500 CMOS SCC 40-DIP
Manufacturer
Zilog
Series
SCCr
Specifications of Z85C3008PSG
Processor Type
Z80
Features
Error Detection and Multiprotocol Support
Speed
8MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Cpu Speed
8MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
85
Rohs Compliant
Yes
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3930
Q2456016A
Z85C3008PSG
Q2456016A
Z85C3008PSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z85C3008PSG
Manufacturer:
ZILOG
Quantity:
6 100
Company:
Part Number:
Z85C3008PSG
Manufacturer:
Zilog
Quantity:
6
Company:
Part Number:
Z85C3008PSG
Manufacturer:
TOSHIBA
Quantity:
3 500
Part Number:
Z85C3008PSG
Manufacturer:
ZILOG
Quantity:
20 000
Company:
Part Number:
Z85C3008PSGSCC
Manufacturer:
ZILOG
Quantity:
2
Overview
PS011705-0608
The features of Zilog’s Z80C30 and Z85C30 devices include:
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Z85C30 — Optimized for Non-Multiplexed Bus Microprocessors.
Z80C30 — Optimized for Multiplexed Bus Microprocessors.
Pin Compatible to NMOS Versions.
Two Independent, 0 to 4.1 Mbit/Second, Full-Duplex Channels. Each channel with
Separate Crystal Oscillator, Baud Rate Generator (BRG), and Digital Phase-Locked
Loop (DPLL) for Clock Recovery.
Multi-Protocol Operation under Program Control; Programmable for NRZ, NRZI, or
FM Data Encoding.
Asynchronous Mode with Five to Eight Bits and One, One and One-Half, or Two
Stop Bits Per Character, Programmable Clock Factor, Break Detection and
Generation; Parity, Overrun, and Framing Error Detection.
Synchronous Mode with Internal or External Character Synchronization on One or
Two Synchronous Characters and CRC Generation and Checking with CRC-16 or
CRC-CCITT Preset to either 1s or 0s.
SDLC/HDLC Mode with Comprehensive Frame-Level Control, Automatic Zero
Insertion and Deletion, I-Field Residue Handling, Abort Generation and Detection,
CRC Generation and Checking, and SDLC Loop.
Software Interrupt Acknowledge Feature (not available with NMOS).
Local Loopback and Auto Echo Modes.
Supports T1 Digital Trunk.
Enhanced DMA Support (not available with NMOS) 10 x 19-Bit Status FIFO 14-Bit
Byte Counter.
Speeds:
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Z85C3O — 8.5, 10, 16.384 MHz
Z80C3O — 8, 10 MHz
CMOS SCC Serial Communications Controller
Product Specification
Overview
1