CY7C63723-SXC Cypress Semiconductor Corp, CY7C63723-SXC Datasheet - Page 44
![IC MCU 8K LS USB/PS-2 18-SOIC](/photos/6/76/67606/428-18-soic_sml.jpg)
CY7C63723-SXC
Manufacturer Part Number
CY7C63723-SXC
Description
IC MCU 8K LS USB/PS-2 18-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
enCoRe™r
Specifications of CY7C63723-SXC
Applications
USB Microcontroller
Core Processor
M8B
Program Memory Type
OTP (8 kB)
Controller Series
CY7C637xx
Ram Size
256 x 8
Interface
PS2, USB
Number Of I /o
10
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-1720-5
CY7C63723-SXC
CY7C63723-SXC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C63723-SXC
Manufacturer:
NS
Quantity:
16
Part Number:
CY7C63723-SXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Characteristics
Document #: 38-08022 Rev. *D
T
T
T
T
T
T
T
T
T
T
T
T
Parameter
SCKH
SCKL
MDO
MDO1
MSU
MHD
SSU
SHD
SDO
SDO1
SSS
SSH
SPI Clock High Time
SPI Clock Low Time
Master Data Output Time
Master Data Output Time,
First bit with CPHA = 1
Master Input Data Set-up time
Master Input Data Hold time
Slave Input Data Set-up Time
Slave Input Data Hold Time
Slave Data Output Time
Slave Data Output Time,
First bit with CPHA = 1
Slave Select Set-up Time
Slave Select Hold Time
Description
V
V
V
CLOCK
oh
ol
crs
(continued)
D+
D−
10%
Figure 43. USB Data Signal Timing
T
High for CPOL = 0, Low for CPOL = 1
Low for CPOL = 0, High for CPOL = 1
SCK to data valid
Time before leading SCK edge
SCK to data valid
Time after SS LOW to data valid
Before first SCK edge
After last SCK edge
R
Figure 42. Clock Timing
90%
T
CH
T
Conditions
CYC
90%
T
CL
T
F
10%
Min.
125
125
–25
100
150
150
50
50
50
50
Max.
CY7C63722C
CY7C63723C
CY7C63743C
100
100
50
Page 44 of 53
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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