CY7C63723-SXC Cypress Semiconductor Corp, CY7C63723-SXC Datasheet - Page 26
![IC MCU 8K LS USB/PS-2 18-SOIC](/photos/6/76/67606/428-18-soic_sml.jpg)
CY7C63723-SXC
Manufacturer Part Number
CY7C63723-SXC
Description
IC MCU 8K LS USB/PS-2 18-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
enCoRe™r
Specifications of CY7C63723-SXC
Applications
USB Microcontroller
Core Processor
M8B
Program Memory Type
OTP (8 kB)
Controller Series
CY7C637xx
Ram Size
256 x 8
Interface
PS2, USB
Number Of I /o
10
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-1720-5
CY7C63723-SXC
CY7C63723-SXC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C63723-SXC
Manufacturer:
NS
Quantity:
16
Part Number:
CY7C63723-SXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Timer Capture Registers
Four 8-bit capture timer registers provide both rising- and falling-edge event timing capture on two pins. Capture Timer A is connected
to Pin 0.0, and Capture Timer B is connected to Pin 0.1. These can be used to mark the time at which a rising or falling event occurs
at the two GPIO pins. Each timer will capture eight bits of the free-running timer into its Capture Timer Data Register if a rising or
falling edge event that matches the specified rising or falling edge condition at the pin. A prescaler allows selection of the capture
timer tick size. Interrupts can be individually enabled for the four capture registers. A block diagram is shown in
Document #: 38-08022 Rev. *D
Capture A Rising Int Enable
Bit 0, Reg 0x44
Capture A Falling Int Enable
Bit 1, Reg 0x44
Capture B Rising Int Enable
Bit 2, Reg 0x44
Capture B Falling Int Enable
Bit 3, Reg 0x44
GPIO
P0.0
GPIO
P0.1
First Edge Hold
Bit 7, Reg 0x44
Rising
Edge
Detect
Falling
Edge
Detect
Rising
Edge
Detect
Falling
Edge
Detect
Free-running Timer
11
10
Figure 27. Capture Timers Block Diagram
9
Prescaler
8
Mux
7
6
5
Timer A Rising Edge Time
Timer A Falling Edge Time
Timer B Rising Edge Time
Timer B Falling Edge Time
8-bit Capture Registers
4
3
2
Capture Timer A Interrupt Request
Capture Timer B Interrupt Request
1
0
1 MHz
Clock
CY7C63722C
CY7C63723C
CY7C63743C
Figure
Page 26 of 53
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