CY7C68013-100AC Cypress Semiconductor Corp, CY7C68013-100AC Datasheet - Page 45

IC MCU USB PERIPH HI SPD 100LQFP

CY7C68013-100AC

Manufacturer Part Number
CY7C68013-100AC
Description
IC MCU USB PERIPH HI SPD 100LQFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r
Datasheet

Specifications of CY7C68013-100AC

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
40
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Q1802289

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Table 9-13. Slave FIFO Synchronous Packet End Strobe Parameters with Externally Sourced IFCLK
9.11
Table 9-14. Slave FIFO Asynchronous Packet End Strobe Parameters
9.12
Table 9-15. Slave FIFO Output Enable Parameters
9.13
Document #: 38-08012 Rev. *C
t
t
t
t
t
t
t
t
t
IFCLK
SPE
PEH
XFLG
PEpwl
PWpwh
XFLG
OEon
OEoff
Parameter
Parameter
Parameter
Slave FIFO Asynchronous Packet End Strobe
Slave FIFO Output Enable
Slave FIFO Address to Flags/Data
IFCLK Period
PKTEND to Clock Set-up Time
Clock to PKTEND Hold Time
Clock to FLAGS Output Propagation Delay
Figure 9-10. Slave FIFO Asynchronous Packet End Strobe Timing Diagram
PKTEND Pulse Width LOW
PKTEND Pulse Width HIGH
PKTEND to FLAGS Output Propagation Delay
SLOE Assert to FIFO DATA Output
SLOE Deassert to FIFO DATA Hold
FIFOADR [1.0]
Figure 9-12. Slave FIFO Address to Flags/Data Timing Diagram
DATA
Figure 9-11. Slave FIFO Output Enable Timing Diagram
SLOE
FLAGS
PKTEND
DATA
FLAGS
Description
Description
Description
t
t
PEpwl
t
OEon
XFLG
t
XFLG
t
XFD
N
N+1
[16]
t
PEpwh
t
OEoff
20.83
Min.
Min.
Min.
8.6
2.5
50
50
[13]
[13]
Max.
Max.
Max.
13.5
10.5
10.5
200
70
[13]
[15]
CY7C68013
Page 45 of 52
Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns

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