CY7C64013-PC Cypress Semiconductor Corp, CY7C64013-PC Datasheet - Page 43

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CY7C64013-PC

Manufacturer Part Number
CY7C64013-PC
Description
IC MCU 8K FULL SPEED USB 28DIP
Manufacturer
Cypress Semiconductor Corp
Series
M8™r
Datasheet

Specifications of CY7C64013-PC

Applications
USB Microcontroller
Core Processor
M8C
Program Memory Type
OTP (8 kB)
Controller Series
CY7C640xx
Ram Size
256 x 8
Interface
I²C, USB, HAPI
Number Of I /o
19
Voltage - Supply
4 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
28-DIP (0.300", 7.62mm)
For Use With
428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1326

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C64013-PC
Manufacturer:
CY
Quantity:
101
Part Number:
CY7C64013-PC
Manufacturer:
CY
Quantity:
116
20.0
Document #: 38-08001 Rev. *A
Address Register Name
0x38- 0x3F DAS Isink
0x1F
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x20
0x21
0x24
0x25
0x26
0x28
0x29
0x30
0x31
0x32
0x40
0x41
0x42
0x43
0x44
Register Summary
Port 0 Data
Port 1 Data
Port 2 Data
Port 3 Data
Port 0 Interrupt Enable
Port 1 Interrupt Enable
Port 2 Interrupt Enable
Port 3 Interrupt Enable
GPIO Configuration
HAPI/I
USB Device Address A
EP A0 Counter
Register
EP A0 Mode Register
EP A1 Counter
Register
EP A1 Mode Register
EP A2 Counter
Register
EP A2 Mode Register
USB Status and Control
Global Interrupt Enable
Endpoint Interrupt
Enable
Timer (LSB)
Timer (MSB)
WDT Clear
I
I
DAC Data
DAC Interrupt Enable)
DAC Interrupt Polarity
Reserved
EP A3 Counter Register
EP A3 Mode Register
EP A4 Counter Register
EP A4 Mode Register
2
2
C Control and Status
C Data
2
C Configuration I
Config Bit 1
2
Timer Bit 7
Timer Bit 7
Endpoint 0
Address A
Endpoint0
I
Reserved
Received
Reserved
Reserved
Reserved
Reserved
Reserved
Received
P0.7 Intr
P1.7 Intr
P2.7 Intr
C Position
Data 0/1
Data 0/1
Data 0/1
Endpoint
2
Data 0/1
Data 0/1
Bit 7
SETUP
SETUP
Enable
Enable
Enable
Device
Enable
STALL
STALL
STALL
Toggle
Toggle
Toggle
MSTR
C Data 7
Toggle
Toggle
Port 3
Mode
P0.7
P1.7
P2.7
P3.7
Size
x
x
Config Bit 0
Timer Bit 6
Timer Bit 6
Endpoint 0
Address A
Data Valid
Endpoint0
Data Valid
Data Valid
Data Valid
Data Valid
Reserved
Reserved
Continue/
I
Reserved
Reserved
Reserved
Received
Reserved
Received
Endpoint
P0.6 Intr
P1.6 Intr
P2.6 Intr
Interrupt
2
Bit 6
Enable
Enable
Enable
Device
Enable
C Data 6
Port 3
Mode
Busy
P0.6
P1.6
P2.6
P3.6
Bit 6
I
IN
x6
x6
IN
2
-
-
-
C
Config Bit 1
Byte Count
Byte Count
Byte Count
Byte Count
Byte Count
Timer Bit 5
Timer Bit 5
Endpoint 0
Address A
Endpoint0
I
Reserved
Reserved
Received
Upstream
Reserved
Reserved
Reserved
Reserved
Received
P0.5 Intr
P1.5 Intr
P2.5 Intr
2
Interrupt
Bit 5
Enable
Enable
Enable
Device
Enable
C Data 5
Port 2
GPIO
Mode
P0.5
P1.5
P2.5
P3.5
Bit 5
Bit 5
OUT
Bit 5
Bit 5
Xmit
Bit 5
OUT
Bit 5
D+
x
x
-
-
-
Config Bit 0
Byte Count
Byte Count
Byte Count
Byte Count
Byte Count
Timer Bit 4
Timer Bit 4
Address A
Reserved
Upstream
I
Reserved
Reserved
Reserved
Reserved
Reserved
P0.4 Intr
P1.4 Intr
P2.4 Intr
Interrupt
2
Bit 4
Enable
Enable
Enable
Device
Enable
C Data 4
Port 2
EPB1
P0.4
P1.4
P2.4
P3.4
Bit 4
Bit 4
ACK
Bit 4
ACK
Bit 4
ACK
ACK
Bit 4
ACK
Bit 4
ACK
D–
x
x
Timer Bit 11 Timer Bit 10
Timer Bit 11 Timer Bit 10
Config Bit 1
Bus Activity
Byte Count
Byte Count
Byte Count
Byte Count
Byte Count
Mode Bit 3
Mode Bit 3
Mode Bit 3
Timer Bit 3
Timer Bit 3
Mode Bit 3
Mode Bit 3
Address A
I
Reserved
Reserved
Reserved
Reserved
P0.3 Intr
P2.3 Intr
USB Hub
2
Interrupt
Interrupt
Bit 3
Enable
Enable
Device
Enable
Enable
C Data 3
Port 1
EPB0
P0.3
P1.3
P2.3
P3.3
Bit 3
Bit 3
Bit 3
Bit 3
Addr
Bit 3
Bit 3
x 3
x 3
Config Bit 0
Byte Count
Byte Count
Byte Count
Byte Count
Byte Count
Mode Bit 2
Mode Bit 2
Mode Bit 2
Timer Bit 2
Timer Bit 2
Mode Bit 2
Mode Bit 2
Address A
ARB Lost/
I
Reserved
Reserved
Reserved
1.024-ms
Reserved
P0.2 Intr
P1.2 Intr
2
Interrupt
Interrupt
Bit 2
Control
Restart
Enable
Enable
Device
Enable
Enable
C Data 2
Port 1
EPA2
P0.2
P1.2
P2.2
P3.2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
x2
x2
Config Bit 1
Byte Count
Mode Bit 1
Byte Count
Mode Bit 1
Byte Count
Mode Bit 1
Timer Bit 1
Timer Bit 1
Byte Count
Mode Bit 1
Byte Count
Mode Bit 1
Address A
Time Bit 9
Time Bit 9
Reserved
I
Reserved
Received
P3.1 Intr
2
P0.1 Intr
P1.1 Intr
Interrupt
Interrupt
I
Bit 1
Control
Enable
Enable
Enable
Device
Enable
Enable
2
C Data 1
Port 0
128-µs
Width
EPA1
C Port
P0.1
P1.1
P2.1
P3.1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Stop
Bit 1
Bit 1
x
x
Config Bit 0
Byte Count
Byte Count
Byte Count
Byte Count
Byte Count
Mode Bit 0
Mode Bit 0
Mode Bit 0
Timer Bit 0
Timer Bit 8
Timer Bit 0
Timer Bit 8
Mode Bit 0
Mode Bit 0
Address A
Reserved
Reserved
I
Reserved
USB Bus
P0.0 Intr
P1.0 Intr
P3.0 Intr
Interrupt
Interrupt
2
RESET
Bit 0
Enable
Enable
Enable
Control
Enable
Enable
Enable
Device
C Data 0
Port 0
EPA0
P0.0
P1.0
P2.0
P3.0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
I
2
x
x
C
Read/Write/
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CY7C64013
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CY7C64113
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Page 43 of 51
Default/
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Reset
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