AT43USB326-AU Atmel, AT43USB326-AU Datasheet - Page 46

IC USB KEYBOARD CTRLR 48LQFP

AT43USB326-AU

Manufacturer Part Number
AT43USB326-AU
Description
IC USB KEYBOARD CTRLR 48LQFP
Manufacturer
Atmel
Series
AVR®r
Datasheet

Specifications of AT43USB326-AU

Applications
Keyboard Controller
Core Processor
AVR
Program Memory Type
Mask ROM (16 kB)
Controller Series
AT43USB
Ram Size
512 x 8
Interface
USB
Number Of I /o
32
Voltage - Supply
4.4 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT43USB326-AU
Manufacturer:
Atmel
Quantity:
10 000
Programming
the USB Module
The USB Function
46
AT43USB326
The USB hardware consists of two devices, hub and function, each with their own device
address and endpoints. Its operation is controlled through a set of memory mapped registers.
The exact configuration of the USB device is defined by the software and it can be pro-
grammed to operate as a compound device, or as a hub only or as a function only. The hub
has the required control and interrupt endpoints. The number of external downstream ports is
programmable from 0 to 2. The DP and DM pins of the unused port(s) must be connected to
ground. The USB function has one control endpoint and 2 programmable endpoints. All the
endpoints have their own 8-byte FIFOs. If the hub is disabled, one extra endpoint becomes
available to the function.
The USB function hardware is designed to operate in the single packet mode and to manage
the USB protocol layer. It consists of a Serial Interface Engine (SIE), endpoint FIFOs and a
Function Interface Unit (FIU). The SIE performs the following tasks: USB signaling detec-
tion/generation, data serialization/de-serialization, data encoding/decoding, bit stuffing and un-
stuffing, clock/data separation, and CRC generation/checking. It also decodes and manages
all packet data types and packet fields.
The endpoint FIFO buffers the data to be sent out or data received. The FIU manages the flow
of data between the SIE, FIFO and the internal microcontroller bus. It controls the FIFO and
monitors the status of the transactions and interfaces to the CPU. It initiates interrupts and
acts upon commands sent by the firmware.
The USB function hardware of the AT43USB326 makes the physical interface and the proto-
col layer transparent to the user. To start the process, the firmware must first enable the
endpoints and which place them in receive mode by default. The device address by default is
address 0. The USB function hardware then waits for a setup token from the host. When a
valid setup token is received, it automatically stores the data packet in endpoint 0 FIFO and
responds with an ACK. It then notifies the microcontroller through an interrupt. The microcon-
troller reads the FIFO and parses the request.
Transactions for the non-control endpoints are even simpler. Once the endpoint is enabled, it
waits for an IN or an OUT token depending whether it is programmed as an IN or OUT end-
point. For example, if it is an IN endpoint, the microcontroller simply loads the data into the
endpoint's FIFO and sets a bit in the control and status register. The USB hardware will
assemble the data in a USB packet and waits for an IN token. When it receives one, it auto-
matically responds by transmitting the data packet and completes the transaction by waiting
for the host's ACK. When one is received, the USB hardware will signal the microcontroller
that the transaction has been completed successfully. Retries and data toggles are performed
automatically by the USB hardware. When the IN endpoint is not ready to send data, in the
case where the microcontroller has not filled the FIFO, it will automatically respond with a
NAK.
Similarly, an OUT endpoint will wait for an OUT token. When one is received, it will store the
data in the FIFO, completes the transaction and interrupt the microcontroller, which then reads
the FIFO and enables the endpoint for the next packet. If the FIFO is not cleared, the USB
hardware will responds with a NAK.
A detailed description of how USB transactions are handled is described in the following sec-
tions. First for a control endpoint and then for non-control endpoints.
3313D–USB–04/06

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