Z9025106PSC Zilog, Z9025106PSC Datasheet - Page 62

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Z9025106PSC

Manufacturer Part Number
Z9025106PSC
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheet

Specifications of Z9025106PSC

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 35 Master I
If bits 4 and 5 both equal 1, then the I
Controlling the I
Software controls the I
Command Register (I
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/
Field
Clock Selection
Reserved
I
I
Reserved
I
I
2
2
2
2
C Selection 1
C Selection 0
C Enable
C Speed (for 6-MHz XTAL) 1, 0
7
2
R/W
C Control Register 0Ch: Bank C (I
2
x
C Interface
2
2
C_CMD:0Bh:0Ch). See Table 36.
C module by writing appropriate commands into the I
6
R/W
x
Bit
Position
7
6
5
4
3
2
5
R/W
0
2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
C Selection 0 prevails.
4
W
R
32 KB Television Controller with OSD
R/W
0
Value Description
00
01
10
11
0
1
0
1
0
1
0
1
3
R/W
2
x
C_CNTL)
1X SCLK for I
0.5X SCLK for I
Return
No Effect
P26 selection - POR
P27 selection - POR
SCLK1 selection on P26
SDATA1 selection on P27
P24 selection - POR
P25 selection - POR
SCLK 0 selection on P24
SDATA0 selection on P25
Must be 0
Disable I
Enable I
10 KHz
50 KHz
100 KHz
330 KHz
2
R/W
1
2
x
2
C Interface
C Interface
2
1
C and ADC
2
R/W
C and ADC
PS001301-0800
x
0
R/W
2
x
C
54

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