Z9025106PSC Zilog, Z9025106PSC Datasheet - Page 43

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Z9025106PSC

Manufacturer Part Number
Z9025106PSC
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheet

Specifications of Z9025106PSC

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 18 Fade Position Register 1 05h: Bank A (FADE_POS1)
Bits 3, 2, 1, and 0 define the boundary row for the fade area. The portion of
the OSD above or below the row number fades up or down, as set in Fade
Direction, ROW_SPACE(6).
The fade starts at the scan line set in FADE_POS2 (4,3,2,1,0) within the row
number set in FADE_POS1 (3,2,1,0).
Table 19 Fade Position Register 2 06h: Bank A (FADE_POS2)
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/
Field
Reserved
Row Number of the Screen
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/
Field
Reserved
Scan Line Number
7
7
R/W
R/W
1
1
Bit
Position
7, 6, 5
4, 3, 2, 1, 0
6
6
R/W
R/W
1
1
Bit
Position
7, 6, 5, 4
3, 2, 1, 0
5
5
R/W
R/W
R/W
1
1
R/W
W
R
4
4
R/W
32 KB Television Controller with OSD
R/W
R/W
R/W
W
R
Value
1
0
Value Description
3
3
R/W
R/W
Description
Return
No effect
Scan Line Number of a row
0
0
Return
No effect
OSD Row number for fading
2
2
1
R/W
R/W
1
0
0
1
1
R/W
R/W
PS001301-0800
0
0
0
0
R/W
R/W
0
0
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