XE8806AMI026TLF Semtech, XE8806AMI026TLF Datasheet - Page 25

• Manufacturer Part Number: XE8806AMI026TLF
• Description: IC MCU LOW PWR MTP FLASH 32-TQFP
• Manufacturer: Semtech

Specifications of XE8806AMI026TLF

• Applications: Sensing Machine
• Core Processor: RISC
• Program Memory Type: FLASH (22 kB)
• Controller Series: XE8000
• Ram Size: 512 x 8
• Interface: UART, USRT
• Number Of I /o: 24
• Voltage - Supply: 2.4 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• For Use With: XE8000MP - PROG BOARD AND PROSTART2 CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: XE8806AMI026TR

code
r
w
r0
r1
c
c1
ca
s
code
glob
cold
pconf
sleep
4.2.1
Address
h0000
h0001
h0002
h0003
h0004
h0005
h0006
h0007
4.2.2
Address
h0010
h0011
h0012
h0013
h0014
h0015
h001B
h001C
© Semtech 2006
RegSysRcTrim1
RegSysRcTrim2
RegSysReset
RegSysClock
RegSysPre0
RegSysMisc
RegSysCtrl
RegSysWd
Reg00
Reg01
Reg02
Reg03
Reg04
Reg05
Reg06
Reg07
Name
access mode
bit can be read
bit can be written
bit always reads 0
bit always reads 1
bit is cleared by writing any value
bit is cleared by writing a 1
bit is cleared after reading
special function, verify the detailed description in the respective peripherals
reset source
nresetglobal
nresetcold
nresetpconf
nresetsleep
Name
Low power data registers (h0000-h0007)
System, clock configuration and reset configuration (h0010-h001F)
rw,0,sleep
rw,0,glob
rw,0,cold
SleepEn
CpuSel
Sleep
7
r0
r0
r0
r0
r0
7
Table 4-2. Reset source coding used in the register definitions
Table 4-1. Access mode codes used in the register definitions
EnResetPConf
SleepFlag
rw,0,cold
rc,0,cold
6
r0
r0
r0
r0
r0
r0
6
Table 4-4. Reset block and clock block registers
EnExtClock
ResetBusError
rc, 0, cold
EnBusError
rw,0,cold
rw,0,cold
Table 4-3. Low power data registers
5
r0
r0
r0
r0
5
RcFreqRange
EnResetWD
ResetWD
rc, 0, cold
rw,0,cold
rw,1,cold
rw,0,cold
BiasRC
rw,00000000,glob
rw,00000000,glob
rw,00000000,glob
rw,00000000,glob
rw,00000000,glob
rw,00000000,glob
rw,00000000,glob
rw,0000000,glob
4
r0
r0
r0
4
Reg00[7:0]
Reg01[7:0]
Reg02[7:0]
Reg03[7:0]
Reg04[7:0]
Reg05[7:0]
Reg06[7:0]
Reg07[7:0]
4-3
ResetfromportA
rc, 0, cold
r,1,sleep
ColdXtal
3
RcFreqFine[5:0]
r0
r0
r0
3
rw,00000,cold
RcFreqCoarse[3:0]
2
r0
r0
r0
r0
r0
WatchDog[3:0]
2
rw,0001,cold
s,0000,glob
EnableXtal
rw,0,sleep
Output16k
rw,0,sleep
XE8806A/XE8807A
1
r0
r0
r0
1
ClearLowPresca
OutputCpuCk
EnableRC
rw,1,sleep
rw,0,sleep
c1r0,0,-
0
r0
r0
0
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