20-101-1132 Rabbit Semiconductor, 20-101-1132 Datasheet - Page 56

MODULE RCM4210 RABBITCORE

20-101-1132

Manufacturer Part Number
20-101-1132
Description
MODULE RCM4210 RABBITCORE
Manufacturer
Rabbit Semiconductor
Datasheet

Specifications of 20-101-1132

Module/board Type
MPU Core Module
Product
Microcontroller Modules
Core Processor
Rabbit 4000
Flash
512 KBytes
Operating Supply Voltage
3 to 3.6 V
Board Size
61 mm x 47 mm x 21 mm
Cpu Core
Rabbit 4000
For Use With/related Products
RCM4210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
316-1125
5.2.4 SRAM Use
The RCM4200 module has a battery-backed data SRAM and a program-execution
SRAM. Dynamic C provides the
placed into the battery-backed SRAM. The compiler generates code that maintains two
copies of each protected variable in the battery-backed SRAM. The compiler also generates
a flag to indicate which copy of the protected variable is valid at the current time. This flag
is also stored in the battery-backed SRAM. When a protected variable is updated, the
“inactive” copy is modified, and is made “active” only when the update is 100% complete.
This assures the integrity of the data in case a reset or a power failure occurs during the
update process. At power-on the application program uses the active copy of the variable
pointed to by its associated flag.
The sample code below shows how a protected variable is defined and how its value can
be restored.
The
battery-backed SRAM without affecting the performance of the application program. Data
integrity is not assured when a reset or power failure occurs during the update process.
Additional information on
User’s Manual.
5.2.4.1 SRAM Chip Select Considerations
The basic SRAM memory on Rabbit-based boards is always connected to /CS1, /OE1, and
/WE1. Both the data SRAM and the program execution fast SRAM on the RCM4200
share /OE1.
The BIOS-defined macro,
high). The macro may be redefined in the BIOS to 1, which will set a bit in the MMIDR
register that forces /CS1 to stay enabled (low). This capability is normally used to speed up
access time for battery-backed SRAM as long as no other memory chips are connected to
/OE1 and /WE1. Therefore, the
of 0 to avoid conflicts between the data SRAM and the program execution fast SRAM.
50
bbram
main() {
protected int state1, state2, state3;
...
_sysIsSoftReset();
keyword may also be used instead if there is a need to store a variable in
bbram
CS1_ALWAYS_ON
CS1_ALWAYS_ON
protected
and
// restore any protected variables
protected
, is set to 0 by default to disable /CS1 (set it
keyword to identify variables that are to be
macro must remain at its default setting
variables is available in the Dynamic C
RabbitCore RCM4200

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