AT40K20LV-3AJC Atmel, AT40K20LV-3AJC Datasheet - Page 60

IC FPGA 3.3V 1024 CELL 84-PLCC

AT40K20LV-3AJC

Manufacturer Part Number
AT40K20LV-3AJC
Description
IC FPGA 3.3V 1024 CELL 84-PLCC
Manufacturer
Atmel
Series
AT40K/KLVr
Datasheet

Specifications of AT40K20LV-3AJC

Number Of Logic Elements/cells
1024
Total Ram Bits
8192
Number Of I /o
62
Number Of Gates
30000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Labs/clbs
-
100Q4 – PQFP
60
Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing
A1
2. To be determined at seating plane.
3. Regardless of the relative size of the upper and lower body sections,
4. Dimension b does not include Dambar protrusion. The Dambar
5. A1 is defined as the distance from the seating plane to the lowest
R
AT40K/AT40KLV Series FPGA
MS-022, Variation GC-1, for additional information.
dimensions D1 and E1 are determined at the largest feature of the body
exclusive of mold Flash and gate burrs, but including any mismatch
between the upper and lower sections of the molded body.
protrusion(s) shall not cause the lead width to exceed b maximum by more
than 0.08 mm. Dambar cannot be located on the lower radius or the lead
foot.
point of the package body.
2325 Orchard Parkway
San Jose, CA 95131
E1
A2
Side View
Top View
e
D1
b
TITLE
100Q4, 100-lead, 14 x 20 mm Body, 3.2 Form Opt.,
Plastic Quad Flat Pack (PQFP)
L1
SYMBOL
A1
A2
D
D1
E
E1
e
b
L1
Bottom View
COMMON DIMENSIONS
0.25
2.50
0.22
MIN
(Unit of Measure = mm)
D
23.20 BSC
20.00 BSC
17.20 BSC
14.00 BSC
1.60 REF
0.65 BSC
NOM
2.70
DRAWING NO.
100Q4
MAX
0.50
2.90
0.40
0896C–FPGA–04/02
E
NOTE
3/29/02
5
2
3
2
3
4
REV.
A

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