XC5VLX220-2FF1760I Xilinx Inc, XC5VLX220-2FF1760I Datasheet - Page 192

IC FPGA VIRTEX-5 220K 1760FBGA

XC5VLX220-2FF1760I

Manufacturer Part Number
XC5VLX220-2FF1760I
Description
IC FPGA VIRTEX-5 220K 1760FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr

Specifications of XC5VLX220-2FF1760I

Number Of Logic Elements/cells
221184
Number Of Labs/clbs
17280
Total Ram Bits
7077888
Number Of I /o
800
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1760-BBGA, FCBGA
For Use With
HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VLX220-2FF1760I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VLX220-2FF1760I
Manufacturer:
XILINX
0
Chapter 5: Configurable Logic Blocks (CLBs)
192
Figure 5-17
single LUT.
X-Ref Target - Figure 5-17
As mentioned earlier, an additional output (MC31) and a dedicated connection between
shift registers allows connecting the last bit of one shift register to the first bit of the next,
without using the LUT O6 output. Longer shift registers can be built with dynamic access
to any bit in the chain. The shift register chaining and the F7AMUX, F7BMUX, and F8MUX
multiplexers allow up to a 128-bit shift register with addressable access to be implemented
in one SLICEM.
configurations that can occupy one SLICEM.
X-Ref Target - Figure 5-18
SHIFTIN (D)
A[5:0]
CLK
WE
shows two 16-bit shift registers. The example shown can be implemented in a
Figure 5-18
Figure 5-17: Dual 16-bit Shift Register Configuration
SHIFTIN1 (AX)
SHIFTIN2 (AI)
Figure 5-18: 64-bit Shift Register Configuration
(WE/CE)
(CLK)
A[3:0]
CLK
www.xilinx.com
CE
through
5
5
DI1
A[6:2]
CLK
WE
DI1
A[6:2]
CLK
WE
Figure 5-20
SRL32
SRL32
MC31
MC31
O6
O6
4
4
DI1
A[5:2]
CLK
WE
DI2
A[5:2]
CLK
WE
illustrate various example shift register
F7AMUX
SRL16
SRL16
A5 (AX)
MC31
SHIFTOUT (Q63)
O5
O6
UG190_5_17_050506
Virtex-5 FPGA User Guide
D Q
UG190 (v5.3) May 17, 2010
(MC31)
(Optional)
(AQ)
UG190_5_18_050506
Output (Q)
Registered
Output

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