XC5VLX85T-1FFG1136C Xilinx Inc, XC5VLX85T-1FFG1136C Datasheet - Page 336

• Manufacturer Part Number: XC5VLX85T-1FFG1136C
• Description: IC FPGA VIRTEX-5 85K 1136FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX85T-1FFG1136C

• Total Ram Bits: 3981312
• Number Of Logic Elements/cells: 82944
• Number Of Labs/clbs: 6480
• Number Of I /o: 480
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1136-BBGA, FCBGA
• No. Of Logic Blocks: 12960
• No. Of Gates: 85000
• Family Type: Virtex-5 LXT
• No. Of Speed Grades: 1
• No. Of I/o's: 480
• Clock Management: PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1527

Chapter 7: SelectIO Logic Resources
X-Ref Target - Figure 7-13
336
CLK
CLK
Q1
Q2
D1
D2
T1
T2
Figure 7-13: IODELAY and IOB in Output Mode when 3-state is Enabled
ODDR
ODDR
IDDR
The second case uses bidirectional IODELAY when the I/O is an input switching to an
output.
by the 3-state TSCONTROL signal coming from the ODDR T flip-flop. This controls the
selection of MUXes E and F for the output path and ODELAY_VALUE respectively.
Additionally, the OBUF changes to not being 3-stated and starts to drive the PAD.
Figure 7-13
DATAOUT
ODATAIN
IODELAY
shows the IOB and IODELAY moving toward the output mode as set
Delay
Chain
www.xilinx.com
TSCONTROL
MUX E
MUX F
T
ODELAY_VALUE
IDELAY_VALUE
ODATAIN
IDATAIN
OBUF
IBUF
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
IOB
IODELAY_04_082107
PAD