XC5VLX50-1FF1153I Xilinx Inc, XC5VLX50-1FF1153I Datasheet - Page 284

• Manufacturer Part Number: XC5VLX50-1FF1153I
• Description: IC FPGA VIRTEX-5 50K 1153FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FF1153I

• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 1769472
• Number Of I /o: 560
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1153-BBGA, FCBGA
• Package: 1153FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 46080
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 560
• Ram Bits: 1769472
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF1153-500-G - BOARD DEV VIRTEX 5 FF1153HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 6: SelectIO Resources
X-Ref Target - Figure 6-76
284
DCI
SSTL2_II_T_DCI (2.5V) Split-Thevenin Termination
SSTL2_II_T_DCI
R 0 = 25
Ω
Figure 6-76: SSTL2_II_T_DCI (2.5V) Split-Thevenin Termination
Figure 6-76
SSTL2_II_T_DCI (2.5V) with on-chip split-Thevenin termination. In this bidirectional I/O
standard, when 3-stated, the termination is invoked on the receiver and not on the driver.
V
Not 3-stated
REF
= 1.25V
IOB
shows a sample circuit illustrating a valid termination technique for
Z 0
www.xilinx.com
3-stated
IOB
V
CCO
2R
2R
= 2.5V
VRP
VRN
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
V
REF
= 1.25V
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
SSTL2_II_T_DCI
ug190_6_92_041206
R 0 = 25
+
–
Ω