XC5VLX30-1FF324C Xilinx Inc, XC5VLX30-1FF324C Datasheet - Page 75

• Manufacturer Part Number: XC5VLX30-1FF324C
• Description: IC FPGA VIRTEX-5 30K 324FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX30-1FF324C

• Number Of Logic Elements/cells: 30720
• Number Of Labs/clbs: 2400
• Total Ram Bits: 1179648
• Number Of I /o: 220
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 324-BBGA, FCBGA
• For Use With: HW-AFX-FF324-500-G - BOARD DEV VIRTEX 5 FF324
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Application Examples
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Standard Usage
Board-Level Clock Generation
The Virtex-5 FPGA DCM can be used in a variety of creative and useful applications. The
following examples show some of the more common applications.
The circuit in
access to RST and LOCKED pins. This example shows the simplest use case for a DCM.
X-Ref Target - Figure 2-8
The board-level clock generation example in
generate output clocks for other components on the board. This clock can then be used to
interface with other devices. In this example, a DDR register is used with its inputs
connected to GND and V
stays within global routing until it reaches the output register. The quality of the clock is
maintained.
The board-level clock generation example in
the clock generation for a forwarded clock on the board.
Figure 2-8
IBUFG
IBUF
shows DCM_BASE implemented with internal feedback and
CC
www.xilinx.com
. Because the output of the DCM is routed to BUFG, the clock
Figure 2-8: Standard Usage
CLKIN
CLKFB
RST
DCM_BASE
Figure
Figure 2-9
2-10, with internal feedback, illustrates
CLKFX180
CLK2X180
LOCKED
CLK180
CLK270
CLKDV
CLKFX
illustrates how to use a DCM to
CLK2X
CLK90
CLK0
Application Examples
ug190_2_08_032506
BUFG
OBUF
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