XC3SD1800A-5FGG676C Xilinx Inc, XC3SD1800A-5FGG676C Datasheet - Page 40
![SPARTAN-3ADSP FPGA 1800K 676FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC3SD1800A-5FGG676C
Manufacturer Part Number
XC3SD1800A-5FGG676C
Description
SPARTAN-3ADSP FPGA 1800K 676FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3SD3400A-4FGG676C.pdf
(4 pages)
3.XC3SD3400A-4FGG676C.pdf
(101 pages)
Specifications of XC3SD1800A-5FGG676C
Number Of Logic Elements/cells
37440
Number Of Labs/clbs
4160
Total Ram Bits
1548288
Number Of I /o
519
Number Of Gates
1800000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
For Use With
122-1574 - KIT DEVELOPMENT SPARTAN 3ADSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3SD1800A-5FGG676C
Manufacturer:
XilinxInc
Quantity:
3 000
Company:
Part Number:
XC3SD1800A-5FGG676C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Company:
Part Number:
XC3SD1800A-5FGG676C
Manufacturer:
XILINX
Quantity:
160
Part Number:
XC3SD1800A-5FGG676C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Clock Buffer/Multiplexer Switching Characteristics
Table 32: Clock Distribution Switching Characteristics
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
T
T
F
GIO
GSI
BUFG
Symbol
The numbers in this table are based on the operating conditions set forth in
Global clock buffer (BUFG, BUFGMUX, BUFGCE) I input to
O-output delay
Global clock multiplexer (BUFGMUX) select S-input setup to I0 and
I1 inputs. Same as BUFGCE enable CE-input
Frequency of signals distributed on global buffers (all sides)
Description
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
Table
7.
Minimum
–
–
0
0.22
0.56
350
-5
Speed Grade
Maximum
0.23
0.63
334
-4
Units
MHz
ns
ns
40