XA3S700A-4FGG400I Xilinx Inc, XA3S700A-4FGG400I Datasheet - Page 36

• Manufacturer Part Number: XA3S700A-4FGG400I
• Description: IC FPGA SPARTAN-3A 700K 400-FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A XAr

Specifications of XA3S700A-4FGG400I

• Number Of Logic Elements/cells: 13248
• Number Of Labs/clbs: 1472
• Total Ram Bits: 368640
• Number Of I /o: 311
• Number Of Gates: 700000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 30: CLB Distributed RAM Switching Characteristics
Table 31: CLB Shift Register Switching Characteristics
36
Clock-to-Output Times
Setup Times
Hold Times
Clock Pulse Width
Clock-to-Output Times
Setup Times
Hold Times
Clock Pulse Width
T
T
WPH
WPH
T
Symbol
Symbol
T
T
T
AH,
T
SHCKO
SRLDH
SRLDS
T
T
T
T
REG
AS
WS
DS
DH
, T
, T
T
WH
WPL
WPL
Time from the active edge at the CLK input to data appearing on the
distributed RAM output
Setup time of data at the BX or BY input before the active transition at the CLK
input of the distributed RAM
Setup time of the F/G address inputs before the active transition at the CLK
input of the distributed RAM
Setup time of the write enable input before the active transition at the CLK
input of the distributed RAM
Hold time of the BX and BY data inputs after the active transition at the CLK
input of the distributed RAM
Hold time of the F/G address inputs or the write enable input after the active
transition at the CLK input of the distributed RAM
Minimum High or Low pulse width at CLK input
Time from the active edge at the CLK input to data appearing on the shift
register output
Setup time of data at the BX or BY input before the active transition at the CLK
input of the shift register
Hold time of the BX or BY data input after the active transition at the CLK input
of the shift register
Minimum High or Low pulse width at CLK input
Description
Description
www.xilinx.com
–
0.36
0.59
0.13
0.01
1.01
0.18
0.16
1.01
Min
DS681 (v1.1) February 3, 2009
Min
0.02
Speed Grade
Speed Grade
–
–
-4
-4
Product Specification
Max
2.01
Max
4.82
–
–
–
–
–
–
–
–
–
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R