XA3S400A-4FGG400Q Xilinx Inc, XA3S400A-4FGG400Q Datasheet - Page 21

• Manufacturer Part Number: XA3S400A-4FGG400Q
• Description: IC FPGA SPARTAN-3A 400K 400-FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A XAr

Specifications of XA3S400A-4FGG400Q

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 368640
• Number Of I /o: 311
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 20: Setup and Hold Times for the IOB Input Path (Continued)
Input Propagation Times
Table 21: Propagation Times for the IOB Input Path
DS681 (v1.1) February 3, 2009
Product Specification
Notes:
1.
2.
3.
Set/Reset Pulse Width
T
Propagation Times
RPW_IOB
Symbol
Symbol
T
The numbers in this table are tested using the methodology presented in
Table 8
This setup time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the data Input. If this is true, add the
appropriate Input adjustment from
These hold times require adjustment whenever a signal standard other than LVCMOS25 is assigned to the data Input. If this is true, subtract
the appropriate Input adjustment from
edge.
IOPLI
and
R
The time it takes for data to travel
from the Input pin through the IFF
latch to the I output with no input
delay programmed
Minimum pulse width to SR control input
on IOB
Table
11.
Description
Description
Table
Table
22.
22. When the hold time is negative, it is possible to change the data before the clock’s active
LVCMOS25
Conditions
www.xilinx.com
(2)
Conditions
Table 26
DELAY_
VALUE
IFD_
0
and are based on the operating conditions set forth in
DELAY_
VALUE
IFD_
XA3S1400A
XA3S200A
XA3S400A
XA3S700A
Device
Device
All
Speed Grade
Speed Grade
Max
2.04
1.74
1.74
1.97
1.61
Min
-4
-4
Units
Units
ns
ns
ns
ns
ns
21