XC3S500E-4PQG208I Xilinx Inc, XC3S500E-4PQG208I Datasheet - Page 127

IC FPGA SPARTAN-3E 500K 208-PQFP

XC3S500E-4PQG208I

Manufacturer Part Number
XC3S500E-4PQG208I
Description
IC FPGA SPARTAN-3E 500K 208-PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S500E-4PQG208I

Package / Case
208-MQFP, 208-PQFP
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.465 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
158
Number Of Logic Elements/cells
*
Number Of Gates
*
No. Of Logic Blocks
1564
No. Of Gates
500000
No. Of Macrocells
10476
Family Type
Spartan-3E
No. Of Speed Grades
4
No. Of I/o's
158
Clock
RoHS Compliant
Total Ram Bits
368640
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3S500E-4PQG208I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S500E-4PQG208I
0
I/O Timing
Table 86: Pin-to-Pin Clock-to-Output Times for the IOB Output Path
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
3.
4.
Clock-to-Output Times
T
Symbol
ICKOFDCM
T
The numbers in this table are tested using the methodology presented in
Table 77
This clock-to-output time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the Global Clock Input or a
standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data Output. If the former is true, add the appropriate
Input adjustment from
DCM output jitter is included in all measurements.
For minimums, use the values reported by the Xilinx timing analyzer.
ICKOF
R
and
When reading from the Output
Flip-Flop (OFF), the time from the
active transition on the Global Clock
pin to data appearing at the Output
pin. The DCM is used.
When reading from OFF, the time
from the active transition on the
Global Clock pin to data appearing at
the Output pin. The DCM is not used.
Table
80.
Table
Description
91. If the latter is true, add the appropriate Output adjustment from
www.xilinx.com
LVCMOS25
12 mA output drive,
Fast slew rate,
with DCM
LVCMOS25
12 mA output drive,
Fast slew rate,
without DCM
Conditions
(3)
Table 95
(2)
(2)
,
,
and are based on the operating conditions set forth in
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
Device
Table
DC and Switching Characteristics
94.
Max
2.66
3.00
3.01
3.01
3.00
5.60
4.91
4.98
5.36
5.45
Speed Grade
-5
Max
2.79
3.45
3.46
3.46
3.45
5.92
5.43
5.51
5.94
6.05
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
127

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