XC3S500E-4PQG208I Xilinx Inc, XC3S500E-4PQG208I Datasheet - Page 11

• Manufacturer Part Number: XC3S500E-4PQG208I
• Description: IC FPGA SPARTAN-3E 500K 208-PQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S500E-4PQG208I

• Package / Case: 208-MQFP, 208-PQFP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.1 V ~ 3.465 V
• Operating Temperature: -40°C ~ 100°C
• Number Of I /o: 158
• Number Of Logic Elements/cells: *
• Number Of Gates: *
• No. Of Logic Blocks: 1564
• No. Of Gates: 500000
• No. Of Macrocells: 10476
• Family Type: Spartan-3E
• No. Of Speed Grades: 4
• No. Of I/o's: 158
• Clock: RoHS Compliant
• Total Ram Bits: 368640
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS312-2 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
IDDRIN1
IDDRIN2
OTCLK1
OTCLK2
ICLK1
ICLK2
IDDRIN1/IDDRIN2 signals shown with dashed lines connect to the adjacent IOB in a differential pair only, not to the FPGA fabric.
All IOB control and output path signals have an inverting polarity option wihtin the IOB.
TCE
OCE
REV
IQ1
ICE
IQ2
T1
T2
SR
O1
O2
T
I
R
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
SR
SR REV
SR
SR REV
SR
SR REV
REV
REV
REV
Q
Q
Q
Q
Q
Q
Figure 5: Simplified IOB Diagram
TFF1
TFF2
OFF1
OFF2
IFF1
IFF2
Programmable
Programmable
www.xilinx.com
DDR
MUX
DDR
MUX
Delay
Delay
Three-state Path
Input Path
Output Path
Program-
Output
mable
Driver
Single-ended Standards
LVCMOS, LVTTL, PCI
Differential Standards
using V REF
Functional Description
Pull-Up
Down
Pull-
Keeper
Latch
DS312-2_19_110606
V
Pin
I/O Pin
from
Adjacent
IOB
ESD
ESD
V
REF
CCO
I/O
Pin
11