EP4SGX230DF29I3 Altera, EP4SGX230DF29I3 Datasheet - Page 48
EP4SGX230DF29I3
Manufacturer Part Number
EP4SGX230DF29I3
Description
IC STRATIX IV FPGA 230K 780FBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX230DF29I3
Number Of Logic Elements/cells
228000
Number Of Labs/clbs
9120
Total Ram Bits
17133
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SGX230DF29I3N
Manufacturer:
INTERSIL
Quantity:
101
1–40
Table 1–30. Transceiver Block Jitter Specifications for Stratix IV GX Devices
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Deterministic Jitter
CPRI Receiver Jitter Tolerance
Total jitter tolerance
Deterministic jitter tolerance
Total jitter tolerance
Deterministic jitter tolerance
Combined deterministic and
random jitter tolerance
OBSAI Transmit Jitter Generation
Total jitter at 768 Mbps,
1536 Mbps, and 3072 Mbps
Deterministic jitter at
768 Mbps, 1536 Mbps, and
3072 Mbps
OBSAI Receiver Jitter Tolerance
Deterministic jitter tolerance
at 768 Mbps, 1536 Mbps,
and 3072 Mbps
Combined deterministic and
random jitter tolerance at
768 Mbps, 1536 Mbps, and
3072 Mbps
Sinusoidal Jitter tolerance at
768 Mbps
Description
Symbol/
E.6.HV, E.12.HV
Pattern = CJPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
E.6.HV, E.12.HV
Pattern = CJPAT
E.6.HV, E.12.HV
Pattern = CJPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
E.6.LV, E.12.LV, E.24.LV,
E.30.LV
Pattern = CJTPAT
REFCLK = 153.6MHz
Pattern = CJPAT
REFCLK = 153.6MHz
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Jitter Frequency =
5.4 KHz
Pattern = CJPAT
Jitter Frequency =
460 MHz to 20 MHz
Pattern = CJPAT
(17)
(18)
(18)
Conditions
Min
—
—
—
—
–2 Commercial
Speed Grade
> 0.66
> 0.65
> 0.37
> 0.55
> 0.37
> 0.55
> 0.4
> 8.5
> 0.1
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Typ
—
—
—
—
0.14
0.17
Max
0.35
0.17
Min
(Note
—
—
—
—
–2× Commercial
–3 Commercial/
Industrial and
Speed Grade
1),
> 0.66
> 0.65
> 0.37
> 0.55
> 0.37
> 0.55
Typ
> 0.4
> 8.5
> 0.1
—
—
—
—
(2)
Max
0.14
0.17
0.35
0.17
(Part 7 of 8)
April 2011 Altera Corporation
Min
Switching Characteristics
—
—
—
—
Industrial Speed
–4 Commercial/
Typ
> 0.66
> 0.65
> 0.37
> 0.55
> 0.37
> 0.55
Grade
—
—
—
—
> 0.4
> 8.5
> 0.1
Max
0.14
0.17
0.35
0.17
Unit
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI