EP1S60F1020C5N Altera, EP1S60F1020C5N Datasheet - Page 60
EP1S60F1020C5N
Manufacturer Part Number
EP1S60F1020C5N
Description
IC STRATIX FPGA 60K LE 1020-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S60F1020C5N
Number Of Logic Elements/cells
57120
Number Of Labs/clbs
5712
Total Ram Bits
5215104
Number Of I /o
773
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
EP1S60F1020C5N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S60F1020C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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TriMatrix Memory
2–46
Stratix Device Handbook, Volume 1
Input/Output Clock Mode
Input/output clock mode can be implemented for both the true and
simple dual-port memory modes. On each of the two ports, A or B, one
clock controls all registers for inputs into the memory block: data input,
wren, and address. The other clock controls the block’s data output
registers. Each memory block port, A or B, also supports independent
clock enables and asynchronous clear signals for input and output
registers.
clock mode.
Figures 2–25
and
2–26
show the memory block in input/output
Altera Corporation
July 2005
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