EP1SGX40GF1020C6N Altera, EP1SGX40GF1020C6N Datasheet - Page 28

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EP1SGX40GF1020C6N

Manufacturer Part Number
EP1SGX40GF1020C6N
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet

Specifications of EP1SGX40GF1020C6N

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Family Name
Stratix GX
Number Of Logic Blocks/elements
41250
# I/os (max)
624
Frequency (max)
5GHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.5V
Logic Cells
41250
Ram Bits
3423744
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1SGX40GF1020C6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1SGX40GF1020C6N
Manufacturer:
ALTERA
0
Part Number:
EP1SGX40GF1020C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
2–18
Stratix GX Device Handbook, Volume 1
Deserializer (Serial-to-Parallel Converter)
The deserializer converts the serial stream into a parallel 8- or 10-bit data
bus. The deserializer receives the least significant bit first.
a diagram of the deserializer.
Figure 2–14. Deserializer
Word Aligner
The word aligner aligns the incoming data based on the specific byte
boundaries. The word aligner has three customizable modes of operation:
bit-slip mode, 16-bit mode, and 10-bit mode, the last of which is available
for the basic and SONET modes. The word aligner also has two
non-customizable modes of operation, which are the XAUI and GIGE
modes.
Figure 2–15
parallel clock
High-speed
serial clock
Low-speed
shows the word aligner in bit-slip mode.
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D8
D9
Altera Corporation
Figure 2–14
10
June 2006
is

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