EP1S30F780C7 Altera, EP1S30F780C7 Datasheet - Page 27
![IC STRATIX FPGA 30K LE 780-FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP1S30F780C7
Manufacturer Part Number
EP1S30F780C7
Description
IC STRATIX FPGA 30K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S30F780C7
Number Of Logic Elements/cells
32470
Number Of Labs/clbs
3247
Total Ram Bits
3317184
Number Of I /o
597
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1421
EP1S30SF780C7
EP1S30SF780C7
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S30F780C7
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP1S30F780C7N
Manufacturer:
ALTERA30
Quantity:
144
Part Number:
EP1S30F780C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 27 of 276
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Figure 2–8. Carry Select Chain
Altera Corporation
July 2005
LAB Carry-In
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
LAB Carry-Out
0
0
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
LE9
LE10
1
1
Sum1
Sum2
Sum3
Sum4
Sum5
Sum6
Sum7
Sum8
Sum9
Sum10
Clear & Preset Logic Control
LAB-wide signals control the logic for the register’s clear and preset
signals. The LE directly supports an asynchronous clear and preset
function. The register preset is achieved through the asynchronous load
of a logic high. The direct asynchronous preset does not require a NOT-
gate push-back technique. Stratix devices support simultaneous preset/
LAB Carry-In
Carry-In0
Carry-In1
data1
data2
Stratix Device Handbook, Volume 1
Carry-Out0
LUT
LUT
LUT
LUT
Carry-Out1
Stratix Architecture
Sum
2–13
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