EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 47
EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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AIIGX51003-3.0
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2010
December 2010
AIIGX51003-3.0
1
This chapter describes the Arria
memory logic array blocks (MLABs), 9-Kbit M9K blocks, and 144-Kbit M144K blocks.
MLABs are optimized to implement filter delay lines, small FIFO buffers, and shift
registers. You can use the M9K blocks for general purpose memory applications and
the M144K blocks for processor code storage, packet buffering, and video frame
buffering.
M144K block is only available for Arria II GZ devices.
You can configure each embedded memory block independently with the Quartus
MegaWizard
register. You can stitch together multiple blocks of the same type to produce larger
memories with a minimal timing penalty.
This chapter contains the following sections:
■
■
■
■
“Memory Features” on page 3–2
“Memory Modes” on page 3–10
“Clocking Modes” on page 3–19
“Design Considerations” on page 3–20
™
Plug-In Manager to be a single- or dual-port RAM, FIFO, ROM, or shift
3. Memory Blocks in Arria II Devices
®
II device memory blocks that include 640-bit
Subscribe
®
II
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