EP2S30F672C5 Altera, EP2S30F672C5 Datasheet - Page 183
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EP2S30F672C5
Manufacturer Part Number
EP2S30F672C5
Description
IC STRATIX II FPGA 30K 672-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S30F672C5
Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
500
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
33880
# I/os (max)
500
Frequency (max)
609.76MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
33880
Ram Bits
1369728
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1126
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S30F672C5K
Manufacturer:
ALTERA
Quantity:
220
Company:
Part Number:
EP2S30F672C5N
Manufacturer:
ALTERA
Quantity:
238
Part Number:
EP2S30F672C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
April 2011
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C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
Table 5–59. EP2S90 Row Pins Global Clock Timing Parameters
Table 5–60. EP2S130 Column Pins Regional Clock Timing Parameters
Table 5–61. EP2S130 Column Pins Global Clock Timing Parameters
Parameter
Parameter
Parameter
Industrial
Industrial
Industrial
-0.341
-0.336
-0.052
-0.023
1.585
1.590
1.889
1.732
0.105
1.907
1.750
0.134
Minimum Timing
Minimum Timing
Minimum Timing
EP2S130 Clock Timing Parameters
Tables 5–60
for EP2S130 devices.
Commercial
Commercial
Commercial
-0.341
-0.336
-0.059
-0.029
1.658
1.663
1.981
1.816
0.106
1.998
1.833
0.136
through
5–63
-3 Speed
-3 Speed
-3 Speed
Grade
-0.193
-0.197
Grade
-0.028
Grade
2.757
2.753
show the maximum clock timing parameters
3.405
3.151
0.226
3.420
3.166
0.276
0.022
Stratix II Device Handbook, Volume 1
-4 Speed
-4 Speed
-4 Speed
Grade
-0.235
-0.239
Grade
-0.036
Grade
3.154
3.150
3.722
3.444
0.242
3.740
3.462
0.296
0.018
DC & Switching Characteristics
-5 Speed
-5 Speed
-5 Speed
Grade
-0.278
-0.283
Grade
-0.047
Grade
3.665
3.660
4.326
4.002
0.277
4.348
4.024
0.338
0.014
Unit
Unit
Unit
5–47
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns