EP3C80F780C8 Altera, EP3C80F780C8 Datasheet - Page 32
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EP3C80F780C8
Manufacturer Part Number
EP3C80F780C8
Description
IC CYCLONE III FPGA 80K 780FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
Specifications of EP3C80F780C8
Number Of Logic Elements/cells
81264
Number Of Labs/clbs
5079
Total Ram Bits
2810880
Number Of I /o
429
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
For Use With
544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2522
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C80F780C8N
Manufacturer:
ALTERA
Quantity:
380
Part Number:
EP3C80F780C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
1–22
Cyclone III Device Handbook, Volume 2
Table 1–30. Cyclone III Devices Emulated LVDS Transmitter Timing Specifications
of 2)
Table 1–31. Cyclone III Devices LVDS Receiver Timing Specifications
TCCS
Output jitter
(peak to peak)
t
Notes to
(1) Emulated LVDS transmitter is supported at the output pin of all I/O banks.
(2) t
f
frequency)
HSIODR
SW
Input jitter
tolerance
t
Notes to
(1) LVDS receiver is supported at all banks.
(2) t
LOCK
HSC LK
LOCK
(2)
(2)
Symbol
Symbol
LOC K
(input clock
LOC K
Table
Table
is the time required for the PLL to lock from the end of device configuration.
is the time required for the PLL to lock from the end of device configuration.
1–30:
1–31:
Modes
Modes
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
—
—
—
—
—
—
Min
Min
100
10
10
10
10
10
10
80
70
40
20
10
—
—
—
—
—
—
C6
C6
437.5
437.5
437.5
437.5
437.5
437.5
437.5
Max
Max
875
875
875
875
875
400
500
200
500
1
1
Min
100
Min
10
10
10
10
10
10
80
70
40
20
10
—
—
—
—
—
—
C7, I7
C7, I7
Chapter 1: Cyclone III Device Data Sheet
402.5
402.5
Max
Max
370
370
370
370
370
740
740
740
740
740
400
500
200
500
1
1
© January 2010 Altera Corporation
(Note 1)
Min
Min
100
10
10
10
10
10
10
80
70
40
20
10
—
—
—
—
—
—
C8, A7
C8, A7
Switching Characteristics
(Note 1)
402.5
402.5
Max
Max
320
320
320
320
320
640
640
640
640
640
400
550
200
550
1
1
(Part 2
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
ms
ms
ps
ps
ps
ps