EP3C55F484I7 Altera, EP3C55F484I7 Datasheet - Page 11

• Manufacturer Part Number: EP3C55F484I7
• Description: IC CYCLONE III FPGA 55K 484 FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C55F484I7

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2396160
• Number Of I /o: 327
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Early System Planning
Configuration Features
© November 2008 Altera Corporation
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FPGA-Based Parallel Flash Loader
The AP configuration scheme configures the Cyclone III device using the Intel
StrataFlash
Memory P33 flash family, which are two industry standard flash families. If your
system contains a parallel flash device, you can use it to store configuration data. The
parallel flash device reduces the configuration time through the parallel interface and
provides a higher memory capacity to store configuration data. However, the parallel
flash device does not support direct device programming through JTAG. With the
FPGA-based PFL, you can use the Cyclone III’s JTAG interface to perform in-system
programming for the parallel flash device. The PFL enables you to program the flash
device indirectly before configuring the Cyclone III with the AP configuration
scheme.
For more information about the FPGA-based PFL, refer to
Parallel Flash Loader with the Quartus II Software.
This section describes the Cyclone III device’s configuration features, specifically the
data compression and remote system upgrade (RSU) and how they affect your design
process.
For the supported features in each configuration scheme, refer to
Data Compression
When you enable data compression, the Quartus II software generates configuration
files with compressed configuration data. This compressed file reduces the storage
requirements in the configuration device or flash memory and decreases the time
needed to transmit the bitstream to the Cyclone III device. The time required by a
Cyclone III device to decompress a configuration file is less than the time needed to
transmit the configuration data to the device. Cyclone III devices support
decompression in the PS (when you use a MAX II device/microprocessor + flash) and
AS configuration schemes. The Cyclone III decompression feature is not available in
the AP, FPP, or JTAG configuration scheme.
To enable compression before compilation, enable Generate compressed bitstreams
on the Configuration tab of the Device & Pin Options dialog box. You can also
enable compression when creating programming files from the Convert
Programming Files window. Open the Properties dialog box for the programming
file, and turn on Compression.
For more information about data compression, refer to the
Devices
Remote System Upgrade
Cyclone III devices support remote update in the AS and AP configuration schemes.
You can enable or disable remote update mode with an option setting in the
Quartus II software. You can implement remote update in conjunction with real-time
decompression of configuration data if you must save configuration memory space in
the serial configuration device with AS configuration. To implement the remote
system upgrade interface, you can use the altremote_update megafunction.
chapter in volume 1 of the Cyclone III Device Handbook.
®
Embedded Memory P30 flash family and the Intel StrataFlash Embedded
AN 478: Using FPGA-Based
Configuring Cyclone III
Table 4 on page
Page 11
9.