EPF10K30RI240-4 Altera, EPF10K30RI240-4 Datasheet - Page 13
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EPF10K30RI240-4
Manufacturer Part Number
EPF10K30RI240-4
Description
IC FLEX 10K FPGA 30K 240-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K30RI240-4
Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
12288
Number Of I /o
189
Number Of Gates
69000
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
240-RQFP
Family Name
FLEX 10K
Number Of Usable Gates
30000
Number Of Logic Blocks/elements
1728
# Registers
738
# I/os (max)
189
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
5V
Logic Cells
1728
Ram Bits
12288
Device System Gates
69000
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
RQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2234
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K30RI240-4
Manufacturer:
ALTERA
Quantity:
5 510
Company:
Part Number:
EPF10K30RI240-4N
Manufacturer:
ALTEAR
Quantity:
500
Altera Corporation
Figure 5. FLEX 10K LAB
Notes:
(1)
(2)
LAB Local
Interconnect (2)
EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
22 inputs to the LAB local interconnect channel from the row; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V,
and EPF10K250A devices have 26.
EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
30 LAB local interconnect channels; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V, and EPF10K250A devices
have 34 LABs.
LAB Control
Signals
(1)
Logic Array Block
Each LAB consists of eight LEs, their associated carry and cascade chains,
LAB control signals, and the LAB local interconnect. The LAB provides
the coarse-grained structure to the FLEX 10K architecture, facilitating
efficient routing with optimum device utilization and high performance.
See
4
4
4
4
4
4
4
4
4
8
Figure
Dedicated Inputs &
Global Signals
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
5.
4
6
Carry-In &
Cascade-In
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
2
2
Row Interconnect
Carry-Out &
Cascade-Out
8
16
24
8
4
16
See Figure 11
for details.
Column
Interconnect
Column-to-Row
Interconnect
13