EPF10K20RC208-3N Altera, EPF10K20RC208-3N Datasheet - Page 13
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EPF10K20RC208-3N
Manufacturer Part Number
EPF10K20RC208-3N
Description
IC FLEX 10K FPGA 20K 208-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K20RC208-3N
Number Of Logic Elements/cells
1152
Number Of Labs/clbs
144
Total Ram Bits
12288
Number Of I /o
147
Number Of Gates
63000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-RQFP
Family Name
FLEX 10K
Number Of Usable Gates
20000
Number Of Logic Blocks/elements
1152
# I/os (max)
147
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
5V
Logic Cells
1152
Ram Bits
12288
Device System Gates
63000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
RQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2208
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K20RC208-3N
Manufacturer:
ALTERA
Quantity:
5 530
Company:
Part Number:
EPF10K20RC208-3N
Manufacturer:
ALTERA
Quantity:
6 100
Altera Corporation
Figure 5. FLEX 10K LAB
Notes:
(1)
(2)
LAB Local
Interconnect (2)
EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
22 inputs to the LAB local interconnect channel from the row; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V,
and EPF10K250A devices have 26.
EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
30 LAB local interconnect channels; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V, and EPF10K250A devices
have 34 LABs.
LAB Control
Signals
(1)
Logic Array Block
Each LAB consists of eight LEs, their associated carry and cascade chains,
LAB control signals, and the LAB local interconnect. The LAB provides
the coarse-grained structure to the FLEX 10K architecture, facilitating
efficient routing with optimum device utilization and high performance.
See
4
4
4
4
4
4
4
4
4
8
Figure
Dedicated Inputs &
Global Signals
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
5.
4
6
Carry-In &
Cascade-In
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
2
2
Row Interconnect
Carry-Out &
Cascade-Out
8
16
24
8
4
16
See Figure 11
for details.
Column
Interconnect
Column-to-Row
Interconnect
13