EPF10K30AQC208-3N Altera, EPF10K30AQC208-3N Datasheet - Page 23
EPF10K30AQC208-3N
Manufacturer Part Number
EPF10K30AQC208-3N
Description
IC FLEX 10KA FPGA 30K 208-PQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K30AQC208-3N
Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
12288
Number Of I /o
147
Number Of Gates
69000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1939
EPF10K30AQC208-3N
EPF10K30AQC208-3N
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Figure 10. LE Clear & Preset Modes
Chip-Wide Reset
Chip-Wide Reset
Asynchronous Clear
(Asynchronous
(Asynchronous
Asynchronous Load with Clear
Asynchronous Load with Preset
labctrl1 or
(Preset)
labctrl2
labctrl2
labctrl2
labctrl1
labctrl1
(Clear)
(Data)
(Data)
data3
data3
Load)
Load)
NOT
NOT
D
CLRN
VCC
PRN
NOT
NOT
Q
Asynchronous Clear
The flipflop can be cleared by either LABCTRL1 or LABCTRL2. In this
mode, the preset signal is tied to V
Chip-Wide Reset
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Chip-Wide Reset
Asynchronous Preset
labctrl1 or
labctrl2
D
CLRN
PRN
Q
VCC
D
CLRN
PRN
D
CLRN
PRN
(Asynchronous
Q
Asynchronous Load without Clear or Preset
Q
CC
labctrl1
(Data)
Load)
data3
to deactivate it.
Chip-Wide Reset
Chip-Wide Reset
NOT
NOT
Asynchronous Clear & Preset
labctrl1
labctrl2
D
CLRN
PRN
D
CLRN
PRN
Q
Q
23
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