EPF10K30AQC208-3N Altera, EPF10K30AQC208-3N Datasheet - Page 18
![IC FLEX 10KA FPGA 30K 208-PQFP](/photos/6/70/67062/544-208-pqfp_sml.jpg)
EPF10K30AQC208-3N
Manufacturer Part Number
EPF10K30AQC208-3N
Description
IC FLEX 10KA FPGA 30K 208-PQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K30AQC208-3N
Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
12288
Number Of I /o
147
Number Of Gates
69000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1939
EPF10K30AQC208-3N
EPF10K30AQC208-3N
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18
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
LE Operating Modes
The FLEX 10K LE can operate in the following four modes:
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. Three inputs to the
LE provide clock, clear, and preset control for the register. The Altera
software, in conjunction with parameterized functions such as LPM and
DesignWare functions, automatically chooses the appropriate mode for
common functions such as counters, adders, and multipliers. If required,
the designer can also create special-purpose functions which use a specific
LE operating mode for optimal performance.
The architecture provides a synchronous clock enable to the register in all
four modes. The Altera software can set DATA1 to enable the register
synchronously, providing easy implementation of fully synchronous
designs.
Figure 9
Normal mode
Arithmetic mode
Up/down counter mode
Clearable counter mode
shows the LE operating modes.
Altera Corporation
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