EP3C5E144I7 Altera, EP3C5E144I7 Datasheet - Page 42
![IC CYCLONE III FPGA 5K 144 EQFP](/photos/6/73/67368/ds-144eqfp-1_2_sml.jpg)
EP3C5E144I7
Manufacturer Part Number
EP3C5E144I7
Description
IC CYCLONE III FPGA 5K 144 EQFP
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
Specifications of EP3C5E144I7
Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
94
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-EQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C5E144I7N
Manufacturer:
Altera
Quantity:
135
Company:
Part Number:
EP3C5E144I7N
Manufacturer:
ALTERA32
Quantity:
345
Part Number:
EP3C5E144I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
1–32
Document Revision History
Table 1–40. Document Revision History
Cyclone III Device Handbook, Volume 2
January 2010
December 2009
July 2009
June 2009
October 2008
July 2008
Date
Table 1–40
Version
3.3
3.2
3.1
3.0
2.2
2.1
lists the revision history for this chapter.
(Part 1 of 3)
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Minor changes to the text.
Minor edit to the hyperlinks.
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Removed Table 1-32 and Table 1-33.
Added
Changed chapter title from DC and Switching Characteristics to “Cyclone III
Device Data Sheet” on page 1–1.
Updated (Note 1) to Table 1–23 on page 1–17.
Updated “External Memory Interface Specifications” on page 1–23.
Replaced Table 1–32 on page 1–23.
Replaced Table 1–33 on page 1–23.
Added Table 1–36 on page 1–26.
Updated “I/O Timing” on page 1–28.
Removed “Typical Design Performance” section.
Removed “I/O Timing” subsections.
Updated chapter to new template.
Updated Table 1–1, Table 1–3, and Table 1–18.
Added (Note 7) to Table 1–3.
Added the “OCT Calibration Timing Specification” section.
Updated “Glossary” section.
Updated Table 1–38.
Added BLVDS information (I/O standard) into Table 1–39, Table 1–40,
Table 1–41, Table 1–42.
Updated Table 1–43, Table 1–46, Table 1–47, Table 1–48, Table 1–49,
Table 1–50, Table 1–51, Table 1–52, Table 1–53, Table 1–54, Table 1–55,
Table 1–56, Table 1–57, Table 1–58, Table 1–59, Table 1–60, Table 1–61,
Table 1–62, Table 1–63, Table 1–68, Table 1–69, Table 1–74, Table 1–75,
Table 1–80, Table 1–81, Table 1–86, Table 1–87, Table 1–92, Table 1–93,
Table 1–94, Table 1–95, Table 1–96, Table 1–97, Table 1–98, and Table 1–99.
Literature: External Memory Interfaces
Changes Made
Chapter 1: Cyclone III Device Data Sheet
© January 2010 Altera Corporation
reference.
Document Revision History