EP2SGX60EF1152C3N Altera, EP2SGX60EF1152C3N Datasheet - Page 77

• Manufacturer Part Number: EP2SGX60EF1152C3N
• Description: IC STRATIX II GX 60K 1152-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX60EF1152C3N

• Number Of Logic Elements/cells: 60440
• Number Of Labs/clbs: 3022
• Total Ram Bits: 2544192
• Number Of I /o: 534
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2181

TriMatrix
Memory
Altera Corporation
October 2007
Column IOE
Row IOE
Maximum performance
True dual-port memory
Simple dual-port memory
Single-port memory
Shift register
ROM
FIFO buffer
Pack mode
Byte enable
Address clock enable
Parity bits
Mixed clock mode
Memory initialization (.mif)
Table 2–18. Stratix II GX Device Routing Scheme (Part 2 of 2)
Table 2–19. TriMatrix Memory Features (Part 1 of 2)
Memory Feature
Source
TriMatrix memory consists of three types of RAM blocks: M512, M4K,
and M-RAM. Although these memory blocks are different, they can all
implement various types of memory with or without parity, including
true dual-port, simple dual-port, and single-port RAM, ROM, and FIFO
buffers.
blocks.
M512 RAM Block
(32 × 18 Bits)
500 MHz
Table 2–19
v
v
v
v
v
v
v
v
v
v
v v v v
shows the size and features of the different RAM
M4K RAM Block
(128 × 36 Bits)
Destination
550 MHz
v v
Stratix II GX Device Handbook, Volume 1
v
v
v
v
v
v
v
v
v
v
v
v
Stratix II GX Architecture
(4K × 144 Bits)
M-RAM Block
420 MHz
v
v
v
v
v
v
v
v
v
(1)
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